Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2003
07/31/2003US20030143849 Method for avoiding defects produced in the CMP process
07/31/2003US20030143848 Chemical mechanical polishing slurry and method for using same
07/31/2003US20030143847 Method of forming low dielectric constant insulating layer and method of manufacturing semiconductor device
07/31/2003US20030143846 Gas compositions for cleaning the interiors of reactors as well as for etching films of silicon- containing compounds
07/31/2003US20030143845 Mask forming and removing method, and a semiconductor device, an electric circuit, a display module, a color filter and an emissive device manufactured by the same method
07/31/2003US20030143844 Method of producing semiconductor element and nonvolatile semiconductor memory produced by this method
07/31/2003US20030143843 Method of forming a copper wiring in a semiconductor device
07/31/2003US20030143842 Damascene copper electroplating process with low-pressure pre-processing
07/31/2003US20030143841 Integration of titanium and titanium nitride layers
07/31/2003US20030143840 Methods for fabricating residue-free contact openings
07/31/2003US20030143839 Sealing porous structures
07/31/2003US20030143838 Interconnect structures in a semiconductor device and processes of formation
07/31/2003US20030143837 Method of depositing a catalytic layer
07/31/2003US20030143836 Power semicondutor component and method for producing the same
07/31/2003US20030143835 Dual damascene process for improving planarization of an inter-metal dielectric layer
07/31/2003US20030143834 Low relative permittivity siox film, production method, semiconductor device comprising the film
07/31/2003US20030143832 Dielectric between metal structures and method therefor
07/31/2003US20030143830 Method of improving copper interconnect of semiconductor devices for bonding
07/31/2003US20030143828 Novel method of fabricating metallic local interconnections that also improves transistor performance
07/31/2003US20030143827 Low area metal contacts for photovoltaic devices
07/31/2003US20030143826 Method of manufacturing semiconductor device
07/31/2003US20030143825 Semiconductor device and method of manufacturing the same
07/31/2003US20030143824 Pattern formation method
07/31/2003US20030143823 Method of operating a processing chamber having multiple stations
07/31/2003US20030143822 Silicon-based film formation process, silicon-based film, semiconductor device, and silicon-based film formation system
07/31/2003US20030143821 Plasma processing method and method for manufacturing semiconductor device
07/31/2003US20030143820 Method for processing semiconductor wafers in an enclosure with a treated interior surface
07/31/2003US20030143819 Method of producing semiconductor chips with a chip edge guard, in particular for wafer level packaging chips
07/31/2003US20030143818 Method of applying a bottom surface protective coating to a wafer, and wafer dicing method
07/31/2003US20030143817 Method of forming shallow trench isolation
07/31/2003US20030143816 Integrated circuit having SiC layer
07/31/2003US20030143815 Semiconductor device and method of fabricating the same
07/31/2003US20030143814 Methods of forming field effect transistors including floating gate field effect transistors
07/31/2003US20030143813 Semiconductor device and method
07/31/2003US20030143812 Reduction of negative bias temperature instability in narrow width PMOS using F2 implanation
07/31/2003US20030143811 Method for radiation hardening N-channel MOS transistors
07/31/2003US20030143810 Semiconductor device including impurity layer having continuous portions formed at different depths and method of manufacturing the same
07/31/2003US20030143809 Method for achieving high self-aligning vertical gate studs relative to the support isolation level
07/31/2003US20030143808 Fabrication method for flash memory
07/31/2003US20030143807 Methods of forming hemispherical grained silicon on a template on a semiconductor work object
07/31/2003US20030143806 Processing methods of forming an electrically conductive plug to a node location
07/31/2003US20030143805 Semiconductor device having a capacitor and method of manufacturing the same
07/31/2003US20030143804 Method for fabricating semiconductor device
07/31/2003US20030143803 Methods of patterning a multi-layer film stack and forming a lower electrode of a capacitor
07/31/2003US20030143802 Method of forming a bottle-shaped trench in a semiconductor substrate
07/31/2003US20030143801 Method of reducing oxygen vacancies and DRAM processing method
07/31/2003US20030143800 Feram capacitor post stack etch clean/repair
07/31/2003US20030143799 Manufacturing method of semiconductor device
07/31/2003US20030143798 Method for manufacturing horizontal surrounding gate flash memory cell
07/31/2003US20030143797 High reliability non-conductive adhesives for non-solder flip chip bondings and flip chip bonding method using the same
07/31/2003US20030143794 Production method for semiconductor device
07/31/2003US20030143792 Twin MONOS cell fabrication method and array organization
07/31/2003US20030143791 Methods for fabricating MOS transistors with notched gate electrodes
07/31/2003US20030143790 Methods of fabricating a stack-gate flash memory array
07/31/2003US20030143789 Method for eliminating polysilicon residue by tilted ion implantation with oxygen
07/31/2003US20030143787 Method of forming channel in thin film transistor using non-ionic excited species
07/31/2003US20030143786 Method of making an integrated photodetector
07/31/2003US20030143784 Thin film manufacturing method and manufacturing apparatus, and thin-film transistor and manufacturing method
07/31/2003US20030143783 Method to form relaxed SiGe layer with high Ge content
07/31/2003US20030143781 Encapsulated integrated circuit package and method of manufacturing an integrated circuit package
07/31/2003US20030143780 Method and apparatus for manufacture and inspection of semiconductor device
07/31/2003US20030143779 Semiconductor device and method for manufacturing the same
07/31/2003US20030143778 Bond surface conditioning system for improved bondability
07/31/2003US20030143776 Method of manufacturing an encapsulated integrated circuit package
07/31/2003US20030143775 Wafer-level through-wafer packaging process for mems and mems package produced thereby
07/31/2003US20030143774 Optical semiconductor integrated circuit device and manufacturing method for the same
07/31/2003US20030143771 Method of fabricating nitride semiconductor, method of fabricating nitride semiconductor device, nitride semiconductor device, semiconductor light emitting device and method of fabricating the same
07/31/2003US20030143770 Method of heat-treating nitride compound semiconductor layer and method of producing semiconductor device
07/31/2003US20030143767 Cluster packaging of light emitting diodes
07/31/2003US20030143765 Method of fabricating nitride semiconductor device
07/31/2003US20030143762 Interconnect structure
07/31/2003US20030143761 Method of manufacturing a semiconductor device
07/31/2003US20030143747 Active pulse monitoring in a chemical reactor
07/31/2003US20030143496 Executing a multiple exposure to a first layer on a substrate, by use of a plurality of first masks; executing a multiple exposure to a second layer on the substrate, by use of plurality of second masks
07/31/2003US20030143495 For removing photoresist residues after dry etching without attacking the wiring material or the interlayer insulating film
07/31/2003US20030143494 Performing pattern exposure by selectively irradiating resist film with extreme UV of a wavelength of a 1 nm through 30 nm band at exposure energy of 5 mJ/cm2 or less; forming a resist pattern by developing resist film after pattern exposure
07/31/2003US20030143490 Capable of efficiently forming a resist pattern reduced in thickness
07/31/2003US20030143489 Method of inhibiting pattern collapse using a relacs material
07/31/2003US20030143483 Etching resistance
07/31/2003US20030143482 Negative resist composition, method for the formation of resist patterns and process for the production of electronic devices
07/31/2003US20030143479 Positive photoresist composition and method of patterning resist thin film for use in inclined implantation process
07/31/2003US20030143406 Providing a film of compliant material; pre-forming film of compliant material to conform a shape of film to a mold cavity surface of transfer mold; placing pre-formed film of compliant material within transfer mold adjacent to mold cavity surface
07/31/2003US20030143377 Display apparatus having a light shielding layer
07/31/2003US20030143375 Silicon thin film, group of silicon single crystal grains and formation process thereof, and semiconductor device, flash memory cell and fabrication process thereof
07/31/2003US20030143341 Dimensional stability, a low-dielectric constant, and are stable at high temperatures
07/31/2003US20030143340 Method for forming thin film with a gas cluster ion beam
07/31/2003US20030143337 Efficiency
07/31/2003US20030143333 Subjecting a hydrothermally formed film to hydrothermally processing in an aqueous solution having a pH of about 5 to 7
07/31/2003US20030143328 For performing single chamber cyclical layer deposition, combined cyclical layer deposition and plasma- enhanced chemical vapor deposition; plasma-enhanced chemical vapor deposition; and/or chemical vapor deposition
07/31/2003US20030143322 Vertical MIMCap manufacturing method
07/31/2003US20030142862 Stereoscopic three-dimensional metrology system and method
07/31/2003US20030142860 Mechanisms for making and inspecting reticles
07/31/2003US20030142785 X-ray-reflective mirrors exhibiting reduced thermal stress, and X-ray optical systems comprising same
07/31/2003US20030142781 X-ray fluorescence spectrometer for semiconductors
07/31/2003US20030142724 Integrated circuit with temperature sensor and method for heating the circuit
07/31/2003US20030142578 Electrically programmable resistance cross point memory structure
07/31/2003US20030142564 Circuit and method for an open bit line memory cell with a vertical transistor and trench plate trench capacitor
07/31/2003US20030142559 256 Meg dynamic random access memory
07/31/2003US20030142550 Semiconductor device
07/31/2003US20030142540 Thin film magnetic memory device with high-accuracy data read structure having a reduced number of circuit elements