Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2003
11/13/2003US20030211735 Si seasoning to reduce particles, extend clean frequency, block mobile ions and increase chamber throughput
11/13/2003US20030211734 Resist resin, chemical amplification type resist, and method of forming of pattern with the same
11/13/2003US20030211733 Graded/stepped silicide process to improve mos transistor
11/13/2003US20030211732 High-resistivity metal in a phase-change memory cell
11/13/2003US20030211731 Metal sandwich structure for MIM capacitor onto dual damascene
11/13/2003US20030211730 Method for forming contact hole in semiconductor device
11/13/2003US20030211729 Method of fabricating a sub-lithographic sized via
11/13/2003US20030211728 Very low dielectric constant plasma-enhanced CVD films
11/13/2003US20030211727 Dual damascene process
11/13/2003US20030211725 Dual damascene processing method using silicon rich oxide layer thereof and its structure
11/13/2003US20030211724 Providing electrical conductivity between an active region and a conductive layer in a semiconductor device using carbon nanotubes
11/13/2003US20030211723 Semiconductor devices and method for their manufacture
11/13/2003US20030211721 Semiconductor device with a fluorinated silicate glass film as an interlayer metal dielectric film, and manufacturing method thereof
11/13/2003US20030211719 Method of manufacturing a semiconductor device
11/13/2003US20030211718 MIS field effect transistor and method of manufacturing the same
11/13/2003US20030211717 Semiconductor device with a self-aligned contact and a method of manufacturing the same
11/13/2003US20030211716 Semiconductor device and method for fabricating the same
11/13/2003US20030211715 Method for forming a retrograde implant
11/13/2003US20030211714 Irradiation method of laser beam
11/13/2003US20030211713 Semiconductor device and method for manufacturing
11/13/2003US20030211712 Epitaxial plasma enhanced chemical vapor deposition (PECVD) method providing epitaxial layer with attenuated defects
11/13/2003US20030211711 Wafer processing method and ion implantation apparatus
11/13/2003US20030211710 Method of manufacturing III-V group compound semiconductor
11/13/2003US20030211709 Semiconductor wafer and method for manufacturing semiconductor devices
11/13/2003US20030211708 Method for producing semiconductor laser components
11/13/2003US20030211707 Method and system for dicing wafers, and semiconductor structures incorporating the products thereof
11/13/2003US20030211705 Method for low temperature bonding and bonded structure
11/13/2003US20030211704 Thermally stable crystalline defect-free germanium bonded to silicon and silicon dioxide
11/13/2003US20030211703 Methods of fabricating integrated circuit devices having trench isolation structures
11/13/2003US20030211702 Dual trench isolation using single critical lithographic patterning
11/13/2003US20030211701 Semiconductor device including an isolation trench having a dopant barrier layer formed on a sidewall thereof and a method of manufacture therefor
11/13/2003US20030211699 Semiconductor device and its manufacture
11/13/2003US20030211698 Encapsulated metal structures for semiconductor devices and MIM capacitors including the same
11/13/2003US20030211697 Multiple etch method for fabricating spacer layers
11/13/2003US20030211696 Semiconductor device and fabrication method thereof
11/13/2003US20030211695 Methods of fabricating high density mask rom cells
11/13/2003US20030211694 Semiconductor device and method for manufacturing the same
11/13/2003US20030211693 Semiconductor device and method for manufacturing the same
11/13/2003US20030211692 Method of fabricating trap type nonvolatile memory device
11/13/2003US20030211691 Method for manufacturing semiconductor devices
11/13/2003US20030211690 Non-volatile memory device with enlarged trapping layer
11/13/2003US20030211689 Nonvolatile memory device with a non-planar gate-insulating layer and method of fabricating the same
11/13/2003US20030211688 Method of forming poly tip of floating gate in split-gate memory
11/13/2003US20030211687 Methods of manufacturing ferroelectric capacitors for integrated circuit memory devices
11/13/2003US20030211686 Method to increase the etch rate and depth in high aspect ratio structure
11/13/2003US20030211685 Method of manufacturing semiconductor device
11/13/2003US20030211684 Gate stack for high performance sub-micron CMOS devices
11/13/2003US20030211683 Minimizing a size of the device isolation region, maximizing a size of the active regions; high integration
11/13/2003US20030211682 Method for fabricating a gate electrode
11/13/2003US20030211681 Fully-depleted SOI MOSFETs with low source and drain resistance and minimal overlap capacitance using a recessed channel damascene gate process
11/13/2003US20030211680 Interfacial layer for gate electrode and high-k dielectric layer and methods of fabrication
11/13/2003US20030211679 Flip chip interface circuit of a semiconductor memory device and method for interfacing a flip chip
11/13/2003US20030211678 Composition and method for cleaning residual debris from semiconductor surfaces
11/13/2003US20030211677 Methods employing hybrid adhesive materials to secure components of semiconductor device assemblies and packages to one another and assemblies and packages including components secured to one another with such hybrid adhesive materials
11/13/2003US20030211676 Stacked local interconnect structure and method of fabricating same
11/13/2003US20030211675 Stacked local interconnect structure and method of fabricating same
11/13/2003US20030211673 Dynamic random access memory with improved contact arrangements
11/13/2003US20030211672 Method of improving quality of interface between gate and gate oxide
11/13/2003US20030211670 Methods for forming low resistivity, ultrashallow junctions with low damage
11/13/2003US20030211669 Semiconductor device and method of manufacturing the same
11/13/2003US20030211668 Method of fabricating thin film transistor
11/13/2003US20030211667 Method of fabricating thin film transistor
11/13/2003US20030211666 Thin-film transistor and method for manufacturing same
11/13/2003US20030211665 Forming patterned thin film metal layers
11/13/2003US20030211664 Semiconductor device and method of manufacturing the same
11/13/2003US20030211663 Body-tied silicon on insulator semiconductor device and method therefor
11/13/2003US20030211662 Semiconductor device with semiconductor circuit comprising semiconductor units, and method for fabricating it
11/13/2003US20030211660 BOC BGA package for die with I-shaped bond pad layout
11/13/2003US20030211659 BOC BGA package for die with I-shaped bond pad layout
11/13/2003US20030211658 System for filling openings in semiconductor products
11/13/2003US20030211657 Stereolithographic method for fabricating heat sinks, stereolithographically fabricated heat sinks, and semiconductor devices including same
11/13/2003US20030211656 Method for fabricating multi-chip package semiconductor device
11/13/2003US20030211655 Stacked die module and techniques for forming a stacked die module
11/13/2003US20030211652 Method and apparatus for the multiplexed acquisition of a bar die from a wafer
11/13/2003US20030211651 Bandgap engineering of tfel devices
11/13/2003US20030211650 Process for wafer level treatment to reduce stiction and passivate micromachined surfaces and compounds used therefor
11/13/2003US20030211649 Organic thin-film transistor, organic thin-film transistor sheet and manufacturing method thereof
11/13/2003US20030211648 Method for micro-fabricating a pixelles infrared imaging device
11/13/2003US20030211647 Method for producing a long wavelength indium gallium arsenide nitride(InGaAsN) active region
11/13/2003US20030211646 Compositions and devices made by synthesis of layers, coatings or films using electrostatic fields
11/13/2003US20030211640 Method and system for maintenance of semiconductor manufacturing
11/13/2003US20030211639 Microelectronic fabrication die electrical test method providing enhanced microelectronic fabrication die electrical test efficiency
11/13/2003US20030211427 Prevent impurities on semiconductor wafers; immersion baths
11/13/2003US20030211426 Method of treating photoresists using electrodeless UV lamps
11/13/2003US20030211410 Exposure method, exposure apparatus, and method of production of device
11/13/2003US20030211407 Alkali-soluble siloxane polymer, positive type resist composition, resist pattern, process for forming the same, electronic device and process for manufacturing the same
11/13/2003US20030211403 Photomask for nearfield exposure, method for making pattern using the photomask, and apparatus for making pattern including the photomask
11/13/2003US20030211400 Method of improving photomask geometry
11/13/2003US20030211312 Using polymer and supercritical carbon dioxide;thermodynamic control
11/13/2003US20030211302 High foaming ratio, thickness
11/13/2003US20030211297 Lithographic apparatus, device manufacturing method, and device manufactured thereby
11/13/2003US20030211244 Integrated circuits; reacting organosilicon compound, hydrocarbon and oxidizer
11/13/2003US20030211232 Rotating substrate; positioning barriers; forming photoresists
11/13/2003US20030210971 Latch sensor for pod transport gripper
11/13/2003US20030210907 Processing method and processing apparatus
11/13/2003US20030210901 Pyrometer calibrated wafer temperature estimator
11/13/2003US20030210591 Magnetic memory device and magnetic substrate
11/13/2003US20030210586 Magnetic storage apparatus having dummy magnetoresistive effect element and manufacturing method thereof
11/13/2003US20030210582 Semiconductor memory device having a side wall insulation film
11/13/2003US20030210570 Non-volatile semiconductor memory device capable of high-speed data reading
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