Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2003
11/20/2003US20030214051 Semiconductor package and method of preparing same
11/20/2003US20030214047 Semiconductor device, method for mounting the same, and method for repairing the same
11/20/2003US20030214046 Semiconductor devices having protected plug contacts and upper interconnections
11/20/2003US20030214044 Sandwich composite dielectric layer yielding improved integrated circuit device reliability
11/20/2003US20030214043 Semiconductor device
11/20/2003US20030214041 Semiconductor device with multilevel wiring layers
11/20/2003US20030214040 Semiconductor device and method of manufacturing the same
11/20/2003US20030214039 Method for fabricating semiconductor device having tertiary diffusion barrier layer for copper line
11/20/2003US20030214038 Semiconductor device
11/20/2003US20030214037 Metallic strain-absorbing layer for improved fatigue resistance of solder-attached devices
11/20/2003US20030214036 Under bump metallurgy structural design for high reliability bumped packages
11/20/2003US20030214035 Bump formed on semiconductor device chip and method for manufacturing the bump
11/20/2003US20030214034 Semiconductor device having bump electrode
11/20/2003US20030214033 Semiconductor device having pad electrode connected to wire
11/20/2003US20030214032 Conductive hardening resin for a semiconductor device and semiconductor device using the same
11/20/2003US20030214029 Multichip wafer-level package and method for manufacturing the same
11/20/2003US20030214027 Circuit substrate device, method for producing the same, semiconductor device and method for producing the same
11/20/2003US20030214025 Semiconductor device
11/20/2003US20030214023 Semiconductor device having multi-chip package
11/20/2003US20030214022 Bit line landing pad and borderless contact on bit line stud with localized etch stop layer formed in void region, and manufacturing method thereof
11/20/2003US20030214021 Molded integrated circuit package with exposed active area
11/20/2003US20030214019 Packaging system for semiconductor devices
11/20/2003US20030214018 Semiconductor integrated circuit device
11/20/2003US20030214017 Method of manufacturing a semiconductor device
11/20/2003US20030214015 Semiconductor device
11/20/2003US20030214014 Semiconductor integrated circuit having anti-fuse, method of fabricating, and method of writing data in the same
11/20/2003US20030214013 Photoresist mask-free oxide define region (ODR)
11/20/2003US20030214012 Power device having electrodes on a top surface thereof
11/20/2003US20030214011 Short channel trench power MOSFET with low threshold voltage
11/20/2003US20030214010 Semiconductor device and method of manufacturing the same
11/20/2003US20030214008 Semiconductor integrated circuit with shortened pad pitch
11/20/2003US20030214006 Semiconductor device and manufacturing method thereof
11/20/2003US20030214005 A-C:H ISFET device, manufacturing method, and testing methods and apparatus thereof
11/20/2003US20030214001 Semiconductor device and method for manufacturing the same
11/20/2003US20030214000 Methods of fabricating integrated circuit devices having uniform silicide junctions and integrated circuit devices fabricated thereby
11/20/2003US20030213999 ESD protection scheme for outputs with resistor loading
11/20/2003US20030213997 Asymmetrical MOSFET layout for high currents and high speed operation
11/20/2003US20030213996 Integrated circuit provided with overvoltage protection and method for manufacture thereof
11/20/2003US20030213994 Thin film memory, array, and operation method and manufacture method therefor
11/20/2003US20030213993 Formed below its base region to improve its breakdown voltage
11/20/2003US20030213992 Semiconductor device
11/20/2003US20030213991 Flash memory cell
11/20/2003US20030213990 Embedded capacitor structure applied to logic integrated circuit
11/20/2003US20030213989 Trench capacitor in a substrate with two floating electrodes independent from the substrate
11/20/2003US20030213987 MIS capacitor and method of formation
11/20/2003US20030213986 Semiconductor device having a ferroelectric capacitor and fabrication process thereof
11/20/2003US20030213985 Ferroelectric capacitor, method of manufacturing same, and semiconductor memory device
11/20/2003US20030213983 Charge-coupled device having a reduced width for barrier sections in a transfer channel
11/20/2003US20030213982 Semiconductor memory device and method for manufacturing the same
11/20/2003US20030213981 Semiconductor device, circuit board, and electronic instrument
11/20/2003US20030213980 Semiconductor device
11/20/2003US20030213975 Semiconductor device
11/20/2003US20030213973 Heterojunction bipolar transistor and its manufacturing method
11/20/2003US20030213972 Semiconductor device used in two systems having different power supply voltages
11/20/2003US20030213971 Silicon controlled rectifier ESD structures with trench isolation
11/20/2003US20030213970 Method and apparatus for forming a capacitive structure including single crystal silicon
11/20/2003US20030213968 Imageable bottom anti-reflective coating for high resolution ligthography
11/20/2003US20030213966 Deposition method of insulating layers having low dielectric constant of semiconductor device, a thin film transistor substrate using the same and a method of manufacturing the same
11/20/2003US20030213964 III-V Nitride homoepitaxial material of improved MOVPE epitaxial quality (surface texture and defect density) formed on free-standing (Al,In,Ga)N substrates, and opto-electronic and electronic devices comprising same
11/20/2003US20030213963 High speed electronic interconnection using a detachable substrate
11/20/2003US20030213961 Method and apparatus for forming a capacitive structure including single crystal silicon
11/20/2003US20030213960 Thin-film capacitor device
11/20/2003US20030213959 Active matrix substrate for a liquid crystal display and method of forming the same
11/20/2003US20030213958 Material for forming insulating film with low dielectric constant, low dielectric insulating film method for forming low dielectric insulating film and semiconductor device
11/20/2003US20030213957 Thin film semiconductor device
11/20/2003US20030213956 Active matrix type display device and method of manufacturing the same
11/20/2003US20030213953 Integrated circuit chips and wafers including on-chip test element group circuits, and methods of fabricating and testing same
11/20/2003US20030213950 Alternative substrates for epitaxial growth
11/20/2003US20030213949 Epitaxial substrates and semiconductor devices
11/20/2003US20030213921 Device manufacturing method, device manufactured thereby and computer programs
11/20/2003US20030213909 Method of inspecting pattern and inspecting instrument
11/20/2003US20030213893 Electron beam apparatus and device manufacturing method using same
11/20/2003US20030213889 Non-contacting holding devices for an optical component, and optical systems and lithographic exposure systems comprising same
11/20/2003US20030213832 Solder ball attaching system and method
11/20/2003US20030213793 Wafer chuck having thermal plate with interleaved heating and cooling elements, interchangeable top surface assemblies and hard coated layer surfaces
11/20/2003US20030213773 Power module member manufactured by wet treatment, and wet treatment method and wet treatment equipment thereof
11/20/2003US20030213772 Integrated semiconductor substrate bevel cleaning apparatus and method
11/20/2003US20030213769 Fabrication of electronic magnetic, optical, chemical, and mechanical systems using chemical endpoint detection
11/20/2003US20030213716 Wafer shipping and storage container
11/20/2003US20030213703 Method and apparatus for substrate polishing
11/20/2003US20030213697 Pressurizing with a flow of gas onto the semiconductor wafer
11/20/2003US20030213617 Method and structure of a reducing intra-level and inter-level capacitance of a semiconductor device
11/20/2003US20030213614 A porous receiving layer is permeated with the fine conductive particles and organometallic compounds from the deposited lamination to provide interlayer connections; electroconductivity
11/20/2003US20030213612 For electrostatic discharge protection; comprising first ring on substrate having plurality of electrically connected lightening bars and second ring concentric to first and having lightening bars electrically isolated from one another
11/20/2003US20030213561 Atmospheric pressure plasma processing reactor
11/20/2003US20030213560 Tandem wafer processing system and process
11/20/2003US20030213506 Stripping solution for an organic light emitting display panel photoresist, includes n-butyl acetate and isopropyl alcohol
11/20/2003US20030213436 Batch type atomic layer deposition apparatus
11/20/2003US20030213431 Substrate treating apparatus
11/20/2003US20030213426 Ceramic film and method of manufacturing the same, semiconductor device, and piezoelectric device
11/20/2003US20030213384 Stencil design for solder paste printing
11/20/2003US20030213382 Microcontact printing
11/20/2003US20030213215 Tablet detecting system for molding tablet supplying apparatus
11/20/2003US20030213143 Gas conduit for a load lock chamber
11/20/2003DE20310920U1 Heat sink manufacture arrangement e.g. for CPU, has connection element and feeding mechanism that work together with e.g. cutting press
11/20/2003DE20309051U1 Holding ring with flange for chemo-mechanical polishing of substrates, e.g. silicon substrates for sequential deposition of (semi)conductor and insulating layers of integrated circuits
11/20/2003DE10217028C1 Meßmodul für Waferfertigungsanlagen Measuring module for wafer fabrication facilities
11/20/2003DE10213546C1 Semiconductor device used in silicon microelectronics comprises a first substrate with an integrated component, a second substrate with an integrated repeater, a coupling layer arranged between the substrates, and a contacting element
11/20/2003CA2485561A1 Method for producing a semiconductor component and semiconductor component produced by the same
11/20/2003CA2484739A1 Ultra small thin windows in floating gate transistors defined by lost nitride spacers
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