| Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368) |
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| 04/23/2002 | US6377486 Block architecture option circuit for nonvolatile semiconductor memory devices |
| 04/23/2002 | US6377483 Semiconductor memory device having improved memory cell and bit line pitch |
| 04/18/2002 | WO2001057874A3 Voltage boost level clamping circuit for a flash memory |
| 04/18/2002 | US20020046318 Flash eeprom system |
| 04/18/2002 | US20020046314 Synchronous memory device having automatic precharge |
| 04/18/2002 | US20020044488 Dynamic random access memory (DRAM) having a structure for emplying a word line low voltage |
| 04/18/2002 | US20020044486 IC card with different page sizes to increase endurance |
| 04/18/2002 | US20020044484 Interface circuit and method for writing data into a non-volatile memory, and scan register |
| 04/18/2002 | US20020043667 Method of designing semiconductor integrated circuit device and semiconductor integrated circuit device |
| 04/17/2002 | EP1197830A2 Integrated circuit I/O using a high performance bus interface |
| 04/17/2002 | CN1083137C Shift register useful as select line scanner for liquid crystal display |
| 04/16/2002 | US6374337 Data pipelining method and apparatus for memory control circuit |
| 04/16/2002 | US6374324 Flash memory array access method and device |
| 04/16/2002 | US6373785 Semiconductor memory device |
| 04/16/2002 | US6373783 Semiconductor integrated circuit, method of controlling the same, and variable delay circuit |
| 04/16/2002 | US6373782 Semiconductor device with reduced error operation caused by threshold voltage variation |
| 04/16/2002 | US6373781 Priority determining circuit for non-volatile memory |
| 04/16/2002 | US6373780 Single supply voltage nonvolatile memory device with row decoding |
| 04/16/2002 | US6373779 Block RAM having multiple configurable write modes for use in a field programmable gate array |
| 04/16/2002 | US6373778 Burst operations in memories |
| 04/16/2002 | US6373776 Dynamic ram and semiconductor device |
| 04/16/2002 | US6373774 Semiconductor memory device with bank configuration |
| 04/16/2002 | US6373770 Integrated circuit memory devices with configurable block decoder circuits |
| 04/16/2002 | US6373769 Decoded autofresh mode in a DRAM |
| 04/16/2002 | US6373753 Memory array having selected word lines driven to an internally-generated boosted voltage that is substantially independent of VDD |
| 04/16/2002 | US6373747 Flash EEprom system |
| 04/16/2002 | US6373742 Two side decoding of a memory array |
| 04/11/2002 | WO2002029818A2 Super low-power generator system for embedded applications |
| 04/11/2002 | WO2002029817A2 Upscaled clock feeds memory to make parallel waves |
| 04/11/2002 | US20020041536 Semiconductor memory and method of operating the same |
| 04/11/2002 | US20020041535 Full page increment/decrement burst for DDR SDRAM/SGRAM |
| 04/11/2002 | US20020041527 Nonvolatile memory, semiconductor device and method of programming to nonvolatile memory |
| 04/11/2002 | US20020041525 Data storage device |
| 04/11/2002 | US20020041524 Semiconductor integrated circuit |
| 04/10/2002 | EP1195770A1 Internal addressing structure of a semiconductor memory |
| 04/10/2002 | EP0806004B1 Data transmission system with a data buffer having a tree shaped structure of multiplexers |
| 04/10/2002 | CN1344028A 半导体集成电路装置 The semiconductor integrated circuit device |
| 04/10/2002 | CN1343987A Semiconductor memory device and memory modulus and system adopting same |
| 04/09/2002 | US6370080 Semiconductor memory for logic-hybrid memory |
| 04/09/2002 | US6370079 Integrated circuits having reduced timing skew among signals transmitted therein using opposingly arranged selection circuits |
| 04/09/2002 | US6370078 Way to compensate the effect of coupling between bitlines in a multi-port memories |
| 04/09/2002 | US6370077 Dynamic random access memory device and semiconductor integrated circuit device |
| 04/09/2002 | US6370076 Folded addressing method for memory architectures |
| 04/09/2002 | US6370071 High voltage CMOS switch |
| 04/09/2002 | US6370059 Nonvolatile semiconductor memory |
| 04/09/2002 | US6370054 Dynamic RAM and semiconductor device |
| 04/09/2002 | US6370053 Memory address driver circuit |
| 04/09/2002 | US6369630 Single-event upset hardened reconfigurable bi-stable CMOS latch |
| 04/09/2002 | US6369627 Delay circuit and semiconductor integrated circuit having same |
| 04/09/2002 | US6369617 Semiconductor integrated circuit and semiconductor logic circuit used in the integrated circuit |
| 04/09/2002 | US6369615 Semiconductor integrated circuit and pulse signal generating method |
| 04/06/2002 | CA2358332A1 Simple method of allowing random access to rambus direct dram for short bursts of data |
| 04/04/2002 | WO2002003391A3 Method and low-power circuits used to generate accurate boosted wordline voltage for flash memory core cells in read mode |
| 04/04/2002 | US20020040437 Semiconductor memory device internally provided with logic circuit which can be readily controlled and controlling method thereof |
| 04/04/2002 | US20020039361 Memory used in packet switching network for successively storing data bits in data storage region and serially outputting data bits and method used therein |
| 04/04/2002 | US20020039324 Semiconductor memory device having altered clock freqency for address and/or command signals, and memory module and system having the same |
| 04/04/2002 | US20020039323 Semiconductor device |
| 04/04/2002 | US20020039317 High performance erasable programmable read-only memory (EPROM) devices with multiple dimension first-level bit lines |
| 04/04/2002 | DE10046578A1 Integrierter Speicher und Speicheranordnung mit mehreren Speichern sowie Verfahren zum Betrieb einer solchen Speicheranordnung Built-in memory and memory array having a plurality of memories and method for operating such a memory array |
| 04/03/2002 | EP1193714A2 High-speed bank select multiplexer latch |
| 04/02/2002 | US6367065 Method and apparatus for N-Nary logic circuit design tool with precharge circuit evaluation |
| 04/02/2002 | US6367027 Skew pointer generation |
| 04/02/2002 | US6366634 Accelerated carry generation |
| 04/02/2002 | US6366611 Circuit for controlling equalization pulse width |
| 04/02/2002 | US6366530 Synchronizing data operations across a synchronization boundary between different clock domains using two-hot encoding |
| 04/02/2002 | US6366529 Fast FiFo memory storage system |
| 04/02/2002 | US6366526 Static random access memory (SRAM) array central global decoder system and method |
| 04/02/2002 | US6366524 Address decoding in multiple-bank memory architectures |
| 04/02/2002 | US6366523 Method and apparatus for anticipatory selection of external or internal addresses in a synchronous memory device |
| 04/02/2002 | US6366507 High speed semiconductor memory device with short word line switching time |
| 04/02/2002 | US6366487 Plurality of integrated circuit chips |
| 04/02/2002 | US6366148 Delay locked loop circuit and method for generating internal clock signal |
| 04/02/2002 | US6366133 Logic circuit |
| 03/28/2002 | WO2002025448A2 Adaptive throttling of memory accesses, such as throttling rdram accesses in a real-time system |
| 03/28/2002 | US20020036947 Semiconductor integrated circuit having clock synchronous type circuit and clock non-synchronous type circuit |
| 03/28/2002 | US20020036946 Semiconductor integrated circuit having enhanced acquisition of external signal |
| 03/28/2002 | US20020036945 1-out-of-N decoder circuit |
| 03/28/2002 | US20020036944 Semiconductor memory, semiconductor integrated circuit and semiconductor mounted device |
| 03/28/2002 | US20020036942 Semiconductor integrated circuit device having a hierarchical power source configuration |
| 03/28/2002 | US20020036937 Semiconductor memory apparatus |
| 03/28/2002 | US20020036936 Driving circuits for a memory cell array in a NAND-type flash memory device |
| 03/28/2002 | US20020036923 Row decoder for a nonvolatile memory device |
| 03/28/2002 | US20020036922 Method and circuitry for bank tracking in write command sequence |
| 03/28/2002 | DE10138952A1 Semiconductor memory e.g. flash memory used in portable computer, supplies voltage from self boosting drivers, to global word lines through NMOS transistors with gate voltage maintained at preset value by precharging |
| 03/28/2002 | DE10022767C2 Adressgenerator zur Erzeugung von Adressen für eine On-Chip Trimmschaltung Address generator for generating addresses for an on-chip trimming circuit |
| 03/27/2002 | EP1191542A2 Driving circuits for a memory cell array in a NAND-type flash memory device |
| 03/27/2002 | EP1191539A2 1 out of N decoding circuit |
| 03/27/2002 | EP1191537A1 Integrated memory and memory device with a plurality of memories and control method thereof |
| 03/27/2002 | CN1341941A Storage |
| 03/26/2002 | US6363032 Programmable counter circuit for generating a sequential/interleave address sequence |
| 03/26/2002 | US6363030 Synchronous semiconductor memory device capable for more reliable communication of control signal and data |
| 03/26/2002 | US6363029 Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions |
| 03/26/2002 | US6363025 Power up initialization circuit responding to an input signal |
| 03/26/2002 | US6363009 Storage device |
| 03/26/2002 | US6363007 Magneto-resistive memory with shared wordline and sense line |
| 03/26/2002 | US6362999 Semiconductor device including a repetitive pattern |
| 03/26/2002 | US6362996 Terminating circuit module used in a computer system |
| 03/26/2002 | US6362658 Decoder for memories having optimized configuration |
| 03/21/2002 | WO2002023550A2 Apparatus for implementing a buffered daisy-chain connection between a memory controller and memory modules |
| 03/21/2002 | WO2002023549A2 Method and system for decoding a row address to assert multiple adjacent rows in a memory structure |