| Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368) |
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| 09/05/2002 | US20020122345 Integrated memory having a plurality of memory cell arrays |
| 09/05/2002 | US20020122335 Burst access memory system |
| 09/05/2002 | US20020121886 Methods to make DRAM fully compatible with SRAM |
| 09/04/2002 | EP1236278A1 Method and apparatus for an n-nary logic circuit |
| 09/04/2002 | EP0832486B1 Nonvolatile memory blocking architecture and redundancy |
| 09/03/2002 | US6446179 Computing system with volatile lock architecture for individual block locking on flash memory |
| 09/03/2002 | US6445645 Random access memory having independent read port and write port and process for writing to and reading from the same |
| 09/03/2002 | US6445640 Method and apparatus for invalidating memory array write operations |
| 09/03/2002 | US6445632 Semiconductor memory device for fast access |
| 09/03/2002 | US6445615 Non-volatile semiconductor memory device and semiconductor disk device |
| 09/03/2002 | US6445611 Method and arrangement for preconditioning in a destructive read memory |
| 09/03/2002 | US6445606 Secure poly fuse ROM with a power-on or on-reset hardware security features and method therefor |
| 08/29/2002 | US20020118592 Differential input buffer bias pulser |
| 08/29/2002 | US20020118591 Semiconductor Integrated circuit device |
| 08/29/2002 | US20020118590 Semiconductor memory device with low power consumption |
| 08/29/2002 | US20020118575 Semiconductor device |
| 08/29/2002 | US20020118568 Semiconductor device with a voltage regulator |
| 08/29/2002 | DE10145153A1 Halbleiterspeichervorrichtung mit steuerbarer Operationszeit des Leseverstärkers A semiconductor memory device having a controllable operating time of the sense amplifier |
| 08/29/2002 | DE10135782A1 Halbleiterspeichervorrichtung A semiconductor memory device |
| 08/28/2002 | EP1235228A1 Semiconductor storage and method for testing the same |
| 08/28/2002 | EP1235225A2 Method and memory device for sequential memory reading with address jump |
| 08/28/2002 | CN1366738A Interleave address generator |
| 08/28/2002 | CN1366308A Semiconductor storage formed for optimizing testing technique and rebundance technique |
| 08/27/2002 | US6442098 High performance multi-bank compact synchronous DRAM architecture |
| 08/27/2002 | US6442097 Virtual channel DRAM |
| 08/27/2002 | US6442096 Fast accessing of a memory device |
| 08/27/2002 | US6442094 Device and method for repairing a memory array by storing each bit in multiple memory cells in the array |
| 08/27/2002 | US6442092 Interface circuit and method for writing data into a non-volatile memory, and scan register |
| 08/27/2002 | US6442072 Row selection circuit for fast memory devices |
| 08/22/2002 | WO2002065476A1 Programmable fuse and antifuse and method therefor |
| 08/22/2002 | US20020116591 Integrated memory |
| 08/22/2002 | US20020114209 Dynamic random access memory device and semiconductor integrated circuit device |
| 08/22/2002 | US20020114208 Semiconductor integrated circuit device and method of controlling the same |
| 08/22/2002 | US20020114206 Data memory with a plurality of memory banks |
| 08/22/2002 | US20020114205 Semiconductor memory device capable of changing an address space thereof |
| 08/22/2002 | US20020114198 Semiconductor storage device formed to optimize test technique and redundancy technology |
| 08/22/2002 | US20020114181 Multiple ports memory-cell structure |
| 08/22/2002 | US20020113635 Memory control circuit |
| 08/22/2002 | US20020113623 Semiconductor integrated circuit and pulse signal generating method |
| 08/22/2002 | US20020113254 Semiconductor memory device |
| 08/22/2002 | US20020113251 Redundant circuit and method for replacing defective memory cells in a memory device |
| 08/21/2002 | EP1233372A1 Circuit and method for protecting a chip arrangement against manipulation and/or against abuse |
| 08/21/2002 | EP1232439A1 A memory expansion module with stacked memory packages |
| 08/21/2002 | CN1089473C Synchronous semicondcutor memory device having an auto-precharge function |
| 08/20/2002 | US6438718 Wordline stress mode arrangement a storage cell initialization scheme test time reduction burn-in elimination |
| 08/20/2002 | US6438086 Recording apparatus and method, reproducing apparatus and method, and recording medium |
| 08/20/2002 | US6438067 Clock generating circuit ensuring a wide lock-allowing frequency range and allowing reduction in layout area as well as a semiconductor device provided with the same |
| 08/20/2002 | US6438064 Semiconductor memory device capable of efficient memory cell select operation with reduced element count |
| 08/20/2002 | US6438062 Multiple memory bank command for synchronous DRAMs |
| 08/20/2002 | US6438041 Negative voltage regulation |
| 08/20/2002 | US6438038 Read circuit of nonvolatile semiconductor memory |
| 08/20/2002 | US6438015 Semiconductor memory device and memory system for improving bus efficiency |
| 08/20/2002 | US6437959 Electrical and/or electronic system integrated with an isolating device and method that isolates a functional module |
| 08/20/2002 | US6437640 Addressable diode isolated thin film array |
| 08/20/2002 | US6437618 Delay locked loop incorporating a ring type delay and counting elements |
| 08/20/2002 | US6437410 Integrated memory |
| 08/20/2002 | US6436725 Method of manufacturing semiconductor device using redundancy technique |
| 08/15/2002 | WO2002063503A2 System and method for storing and retrieving medical images and records |
| 08/15/2002 | US20020110041 Semiconductor memory device with improved setup time and hold time |
| 08/15/2002 | US20020110040 Memory cell decoder not including a charge pump |
| 08/15/2002 | US20020110039 Memory address and decode circuits with ultra thin body transistors |
| 08/15/2002 | US20020110038 Fast random access DRAM management method |
| 08/15/2002 | US20020110037 Dram interface circuit providing continuous access across row boundaries |
| 08/15/2002 | US20020110033 Programmable fuse and antifuse and method therefor |
| 08/15/2002 | US20020110024 Method and apparatus for testing a write function of a dual-port static memory cell |
| 08/15/2002 | US20020110014 Recording system, data recording apparatus, memory apparatus, and data recording method |
| 08/15/2002 | US20020109154 Integrated circuit memory devices providing per-bit redundancy and methods of operating same |
| 08/14/2002 | EP1147518B1 Integrated electric and/or electronic system with means for insulating a functional module, corresponding device and method for insulation and use |
| 08/14/2002 | EP0944906B1 Non-volatile memory array that enables simultaneous read and write operations |
| 08/14/2002 | DE10200685A1 Halbleiterspeichervorrichtung mit mehr als zwei internen Bänken unterschiedlicher Größen A semiconductor memory device with more than two internal banks of different sizes |
| 08/14/2002 | DE10103526A1 Halbleiterspeicher mit abschaltbaren Wortleitungen Semiconductor memory with disconnectable word lines |
| 08/13/2002 | US6434736 Location based timing scheme in memory design |
| 08/13/2002 | US6434080 Semiconductor memory and method of controlling the same |
| 08/13/2002 | US6434073 VPX bank architecture |
| 08/13/2002 | US6434067 Semiconductor memory having multiple redundant columns with offset segmentation boundaries |
| 08/13/2002 | US6434058 Semiconductor integrated circuit |
| 08/13/2002 | US6434056 Set of two memories on the same monolithic integrated circuit |
| 08/13/2002 | US6434042 Non-volatile semiconductor memory device capable of reducing read time |
| 08/13/2002 | US6434041 Circuits and methods for a memory cell with a trench plate trench capacitor and a vertical bipolar read device |
| 08/13/2002 | US6434035 Memory system |
| 08/13/2002 | US6433597 Delay locked loop with reduced noise response |
| 08/13/2002 | US6433583 CMOS switch circuit for transferring high voltages, in particular for line decoding in nonvolatile memories, with reduced consumption during switching |
| 08/08/2002 | WO2002061806A2 Dram cell having a capacitor structure fabricated partially in a cavity and method for operating same |
| 08/08/2002 | WO2001093273A3 Semiconductor memory with programmable bitline multiplexers |
| 08/08/2002 | US20020108018 Memory module control and status |
| 08/08/2002 | US20020105853 Memory access methods and devices for use with random access memories |
| 08/08/2002 | US20020105851 Predecoder control circuit |
| 08/08/2002 | US20020105849 Semiconductor memory device with improved data propagation characteristics of a data bus |
| 08/08/2002 | US20020105842 Semiconductor memory device having improved data transfer rate without providing a register for holding write data |
| 08/08/2002 | US20020105835 Method of programming a plurality of memory cells connected in parallel, and a programming circuit therefor |
| 08/08/2002 | US20020105832 Nonvolatile semiconductor memory device detecting sign of data transformation |
| 08/08/2002 | US20020105825 Bias cell for four transistor (4T) SRAM operation |
| 08/08/2002 | US20020105824 4T memory with boost of stored voltage between standby and active |
| 08/08/2002 | DE10102351A1 Integrierter Speicher Built-in Memory |
| 08/07/2002 | EP1228510A1 Space management for managing high capacity nonvolatile memory |
| 08/07/2002 | CN1088941C 同步二进制计数器 Synchronous binary counter |
| 08/06/2002 | US6430651 Memory device for constituting a memory subsystem of a data processing apparatus |
| 08/06/2002 | US6430100 Redundancy circuitry for repairing defects in packaged memory having registers |
| 08/06/2002 | US6430093 CMOS boosting circuit utilizing ferroelectric capacitors |
| 08/06/2002 | US6430092 Memory device with booting circuit capable of pre-booting before wordline selection |