Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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07/06/2005 | CN1636248A Predictive timing calibration for memory devices |
07/06/2005 | CN1636196A Method and apparatus for determining actual write latency and accurately aligning the start of data capture with the arrival of data at a memory device |
07/06/2005 | CN1635578A Storage device reading phase automatic correction method and correlated mechanism |
07/06/2005 | CN1209817C Refractory fuse circuit for packaged DRAM repair |
07/06/2005 | CN1209767C Circuit for evaluating information content of memory cell |
07/05/2005 | US6915476 Redundancy semiconductor memory device with error correction code (ECC) circuits for correcting errors in recovery fuse data |
07/05/2005 | US6915226 Method and system of calibrating the control delay time |
07/05/2005 | US6914853 Mechanism for efficient wearout counters in destructive readout memory |
07/05/2005 | US6914852 Multi-frequency synchronizing clock signal generator |
07/05/2005 | US6914851 Circuit element with timing control |
07/05/2005 | US6914850 Address buffer having (N/2) stages |
07/05/2005 | US6914847 Semiconductor memory device |
07/05/2005 | US6914846 Flash EEprom system |
07/05/2005 | US6914845 Semiconductor device saving data in non-volatile manner during standby |
07/05/2005 | US6914844 Deep power down switch for memory device |
07/05/2005 | US6914841 System and method for refreshing a dynamic memory device |
07/05/2005 | US6914840 Semiconductor memory circuit |
07/05/2005 | US6914839 Self-timed sneak current cancellation |
07/05/2005 | US6914838 Dual loop sensing scheme for resistive memory elements |
07/05/2005 | US6914837 DRAM memory with a shared sense amplifier structure |
07/05/2005 | US6914836 Sense amplifier circuits using a single bit line input |
07/05/2005 | US6914835 Semiconductor memory device, and semiconductor device with the semiconductor memory device and logic circuit device therein |
07/05/2005 | US6914832 Semiconductor memory device with memory cell array divided into blocks |
07/05/2005 | US6914830 Distributed write data drivers for burst access memories |
07/05/2005 | US6914829 Multi-stage output multiplexing circuits and methods for double data rate synchronous memory devices |
07/05/2005 | US6914828 Semiconductor memory device with structure of converting parallel data into serial data |
07/05/2005 | US6914827 Flash memory device capable of preventing an over-erase of flash memory cells and erase method thereof |
07/05/2005 | US6914822 Read-biasing and amplifying system |
07/05/2005 | US6914820 Erasing storage nodes in a bi-directional nonvolatile memory cell |
07/05/2005 | US6914818 Non-volatile memory and semiconductor device |
07/05/2005 | US6914817 Highly compact EPROM and flash EEPROM devices |
07/05/2005 | US6914815 Nonvolatile semiconductor storage device |
07/05/2005 | US6914814 Dedicated redundancy circuits for different operations in a flash memory device and methods of operating the same |
07/05/2005 | US6914812 Tunnel device level shift circuit |
07/05/2005 | US6914810 Magnetic memory device and manufacturing method thereof |
07/05/2005 | US6914809 Memory cell strings |
07/05/2005 | US6914808 Magnetoresistive random access memory device |
07/05/2005 | US6914807 Magnetic logic element and magnetic logic element array |
07/05/2005 | US6914806 Magnetic memory device |
07/05/2005 | US6914805 Method for building a magnetic keeper or flux concentrator used for writing magnetic bits on a MRAM device |
07/05/2005 | US6914804 Memory cells enhanced for resistance to single event upset |
07/05/2005 | US6914803 Low-power semiconductor memory device |
07/05/2005 | US6914802 Microelectronic photonic structure and device and method of forming the same |
07/05/2005 | US6914801 Method of eliminating drift in phase-change memory |
07/05/2005 | US6914799 Semiconductor memory device |
07/05/2005 | US6914798 Register controlled DLL for reducing current consumption |
07/05/2005 | US6914797 Semiconductor memory |
07/05/2005 | US6914447 High activity, spatially distributed radiation source for accurately simulating semiconductor device radiation environments |
07/05/2005 | US6914297 Configuration for generating a voltage sense signal in a power semiconductor component |
07/05/2005 | US6914285 Semiconductor device having different thickness gate oxides |
07/05/2005 | US6914003 Method for manufacturing magnetic random access memory |
07/05/2005 | US6913937 Memory cell array having ferroelectric capacity, method of manufacturing the same and ferroelectric memory device |
07/05/2005 | US6913875 Curl resistant print media |
07/05/2005 | US6913346 Inkjet printer with contractable chamber |
06/30/2005 | WO2005059955A2 A high temperature memory device |
06/30/2005 | WO2005059953A2 Solid state magnetic memory system and method |
06/30/2005 | WO2005059921A1 Method for initializing resistance-variable material, memory device containing a resistance-variable material, and method for initializing nonvolatile memory circuit including variable resistor |
06/30/2005 | WO2005059920A1 Internal voltage gnerator with temperature control |
06/30/2005 | WO2005041206A8 Method, system and circuit for programming a non-volatile memory array |
06/30/2005 | WO2005020242A3 Magnetic memory element utilizing spin transfer switching and storing multiple bits |
06/30/2005 | WO2005006340A3 Sram cell structure and circuits |
06/30/2005 | WO2004068546A3 Tunnel device level shift circuit |
06/30/2005 | US20050144365 Non-volatile memory and method with control data management |
06/30/2005 | US20050144360 Non-volatile memory and method with block management system |
06/30/2005 | US20050142675 Method of manufacturing micro-electromechanical device having motion-transmitting structure |
06/30/2005 | US20050141350 Information storage medium and apparatus adopting the same |
06/30/2005 | US20050141337 Fully-hidden refresh dynamic random access memory |
06/30/2005 | US20050141336 Method for producing an integrated memory module |
06/30/2005 | US20050141333 Latch circuit and synchronous memory including the same |
06/30/2005 | US20050141332 Semiconductor device including a register to store a value that is representative of device type information |
06/30/2005 | US20050141331 Write circuit of double data rate synchronous DRAM |
06/30/2005 | US20050141330 Semiconductor memory device capable of calibrating data setup time and method for driving the same |
06/30/2005 | US20050141329 Decoder circuit |
06/30/2005 | US20050141328 Semiconductor memory device and method of reading data from semiconductor memory device |
06/30/2005 | US20050141327 Decoding circuit for on die termination in semiconductor memory device and its method |
06/30/2005 | US20050141326 Main row decoder in a semiconductor memory device |
06/30/2005 | US20050141325 Efficent column redundancy techniques |
06/30/2005 | US20050141324 Semiconductor memory device for high speed data access |
06/30/2005 | US20050141323 Semiconductor memory device for reducing lay-out area |
06/30/2005 | US20050141322 Semiconductor memory device |
06/30/2005 | US20050141316 Driving circuit for non-volatile DRAM |
06/30/2005 | US20050141314 Semiconductor integrated circuit device and digital measuring instrument |
06/30/2005 | US20050141313 Non-volatile memory and method with memory planes alignment |
06/30/2005 | US20050141312 Non-volatile memory and method with non-sequential update block management |
06/30/2005 | US20050141311 Semiconductor memory device with optimum refresh cycle according to temperature variation |
06/30/2005 | US20050141310 Semiconductor memory device saving power during self refresh operation |
06/30/2005 | US20050141309 Method and circuit for reducing DRAM refresh power by reducing access transistor sub threshold leakage |
06/30/2005 | US20050141307 Semiconductor device comprising a differential sense amplifier, a write column selection switch and a read column selection switch |
06/30/2005 | US20050141297 Semiconductor memory device of bit line twist system |
06/30/2005 | US20050141293 Memory device for preventing loss of cell data |
06/30/2005 | US20050141292 Internal voltage generating circuit in semiconductor memory device |
06/30/2005 | US20050141290 Floating-body dram using write word line for increased retention time |
06/30/2005 | US20050141289 Semiconductor memory device having the operating voltage of the memory cell controlled |
06/30/2005 | US20050141287 Power-up circuit in semiconductor memory device |
06/30/2005 | US20050141286 Erase method in flash memory device |
06/30/2005 | US20050141285 SONOS device and fabricating method thereof |
06/30/2005 | US20050141283 Non-volatile semiconductor memory device using differential start programming voltage and programming method thereof |
06/30/2005 | US20050141280 Data system |
06/30/2005 | US20050141279 Data access circuit of semiconductor memory device |
06/30/2005 | US20050141277 Non-volatile memory and write method of the same |