Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
07/2005
07/14/2005WO2005064590A1 Method for ultra-fast controlling of a magnetic cell and related devices
07/14/2005WO2005064454A1 Storage device and information processing system
07/14/2005WO2005064357A2 Flux guides for magnetic field sensors and memories
07/14/2005WO2005064356A2 High sensitivity magnetic built-in current sensor
07/14/2005WO2005008672A3 Asynchronous static random access memory
07/14/2005WO2004107407A3 Method of making information storage devices by molecular photolithography
07/14/2005US20050154853 Memory device and method of operation of a memory device
07/14/2005US20050154817 Method of operation and controlling a memory device
07/14/2005US20050153112 A digital camera print roll of wrinkle-resistant print media having a plurality of fibers embedded in the media and configured such that the media has a stiffness in a first direction that exceeds the stiffness in a second direction that is perpendicular to the first direction; panoramic photography
07/14/2005US20050153063 Synthetic antiferromagnetic structure for magnetoelectronic devices
07/14/2005US20050152210 Synchronous dynamic random access memory devices having dual data rate 1 (DDR1) and DDR2 modes of operation and methods of operating same
07/14/2005US20050152209 Synchronous semiconductor memory devices and data strobe input buffers with an input buffer circuit and a detection circuit for buffering data thereto
07/14/2005US20050152208 Phase change memory cell and manufacturing method thereof using minitrenches
07/14/2005US20050152207 Semiconductor device using two types of power supplies supplying different potentials
07/14/2005US20050152205 Semiconductor memory
07/14/2005US20050152201 Semiconductor memory device and control method thereof
07/14/2005US20050152200 Semiconductor memory having variable memory size and method for refreshing the same
07/14/2005US20050152198 Logical operation circuit and logical operation method
07/14/2005US20050152196 Sense amplifier circuit and read/write method for semiconductor memory device
07/14/2005US20050152193 Memory
07/14/2005US20050152185 Data encoding approach for implementing robust non-volatile memories
07/14/2005US20050152183 MRAM architecture with electrically isolated read and write circuitry
07/14/2005US20050152182 Megnetic memory device
07/14/2005US20050152181 Tunneling anisotropic magnetoresistive device and method of operation
07/14/2005US20050152180 Separate write and read access architecture for a magnetic tunnel junction
07/14/2005US20050152179 Bias-adjusted magnetoresistive devices for magnetic random access memory (MRAM) applications
07/14/2005US20050152178 Pseudo tunnel junction
07/14/2005US20050152177 Tamper memory cell
07/14/2005US20050152175 Storage device having a resistance measurement system
07/14/2005US20050152174 Multiple-layer serial diode cell and nonvolatile memory device using the same
07/14/2005US20050152173 Semiconductor integrated circuit device and bit line capacitance adjusting method using the device
07/14/2005US20050152172 FeRAM having differential data
07/14/2005US20050152171 Semiconductor integrated circuit device
07/14/2005US20050152075 Magnetoresistance effect element and method for manufacturing the same, and magnetic memory device
07/14/2005US20050151819 Method and apparatus for protecting a print engine assembly from print media pulling
07/14/2005US20050151777 Integrated circuit with tamper detection circuit
07/14/2005US20050151581 Internal step-down power supply circuit
07/14/2005US20050151198 Apparatus for increasing SRAM cell capacitance with metal fill
07/14/2005US20050151176 Memory cell
07/14/2005US20050150963 Data storage device incorporating a two-dimensional code
07/14/2005DE102004059035A1 Einprägeunterdrückungs-Schaltungsschema Einprägeunterdrückungs circuit diagram
07/13/2005EP1553601A2 Method and apparatus for a high density magnetic random access memory (MRAM) with stackable architecture
07/13/2005EP1553496A1 Information processing device using variable operation frequency
07/13/2005EP1552529A2 Method and apparatus for erasing flash memory
07/13/2005EP1552528A1 Method of establishing reference levels for sensing multilevel memory cell states
07/13/2005EP1552526A2 Magnetic element utilizing spin transfer and an mram device using the magnetic element
07/13/2005EP1552314A2 Sense amplifier with configurable voltage swing control
07/13/2005CN2710107Y Magnetoresistive random access store circuit
07/13/2005CN2710106Y Magnetoresistive random access memory circuit
07/13/2005CN1639868A Non-volatile memory and the fabrication method thereof
07/13/2005CN1639797A Increasing a refresh period in a semiconductor memory device
07/13/2005CN1639796A Narrow conductor design for magnetic random access memory MRAM arrays
07/13/2005CN1638224A Semiconductor device and semiconductor device module
07/13/2005CN1638167A Double-magnetic tunnel junction containing synthesized antiferromagnetic structure and its prepn process
07/13/2005CN1638121A 半导体集成电路装置 The semiconductor integrated circuit device
07/13/2005CN1637952A Data strobe circuit using clock signal
07/13/2005CN1637950A Nonvolatile semiconductor memory device with scalable two transistor memory cells
07/13/2005CN1637948A Set programming methods and write driver circuits for a phase-change memory array
07/13/2005CN1637947A Semiconductor memory device and data read and write method thereof
07/13/2005CN1637946A Internal voltage generating circuit in semiconductor memory device
07/13/2005CN1637945A Power-up circuit semiconductor memory device
07/13/2005CN1637944A Power-up circuit semiconductor memory device
07/13/2005CN1637943A Power-up circuit in semiconductor memory device
07/13/2005CN1637942A Semiconductor memory device with optimum refresh cycle according to temperature variation
07/13/2005CN1637941A Method and apparatus for independent refreshing memory capacity
07/13/2005CN1637940A Semiconductor memory device for high speed data access
07/13/2005CN1637939A Semiconductor memory apparatus
07/13/2005CN1637938A 半导体存储装置 The semiconductor memory device
07/13/2005CN1637937A 半导体存储装置 The semiconductor memory device
07/13/2005CN1637936A Fuse circuit
07/13/2005CN1637935A Semiconductor memory device having external data load signal and serial-to-parallel data prefetch method thereof
07/13/2005CN1637934A Storage circuit, semiconductor device, and electronic apparatus
07/13/2005CN1637933A Imprint suppression circuit scheme
07/13/2005CN1637932A Ferroelectric memory device, electronic apparatus and driving method
07/13/2005CN1637931A Storage circuit, semiconductor device, electronic apparatus, and driving method
07/13/2005CN1637930A Storage circuit, semiconductor device, and electronic apparatus
07/13/2005CN1637929A Ferroelectric ram device and driving method
07/13/2005CN1637928A Magnetic memory device
07/13/2005CN1637927A Magnetic random access memory (MRAM) and method of manufacturing the same
07/13/2005CN1637926A Addressing circuit for a cross-point memory array including cross-point resistive elements
07/13/2005CN1637859A Magnetoresistive element, magnetic head, magnetic reproducing apparatus, and magnetic memory
07/13/2005CN1210819C Electrically programmable memory element with improved contacts
07/13/2005CN1210818C Magnetic component and magnetic head and magnetic memory using this magnetic component
07/13/2005CN1210806C 半导体存储器 Semiconductor memory
07/13/2005CN1210804C Nonvolatile semiconductor memory device
07/13/2005CN1210802C Semiconductor IC
07/13/2005CN1210784C Drive method for semiconductor memory device
07/13/2005CN1210721C Semi-conductor assembly and method for testing and operating a semi-conductor assembly
07/13/2005CN1210718C Film magnetic body storage possessing highly integrated storage array
07/12/2005US6918072 Circuit and method for time-efficient memory repair
07/12/2005US6918048 System and method for delaying a strobe signal based on a slave delay base and a master delay adjustment
07/12/2005US6918046 High speed interface device for reducing power consumption, circuit area and transmitting/receiving a 4 bit data in one clock period
07/12/2005US6917563 Integrated memory
07/12/2005US6917562 Semi-conductor component with clock relaying device
07/12/2005US6917561 Memory controller and method of aligning write data to a memory device
07/12/2005US6917560 Reduction of capacitive effects in a semiconductor memory device
07/12/2005US6917556 Static memory cell having independent data holding voltage
07/12/2005US6917553 Semiconductor memory device
07/12/2005US6917552 Semiconductor device using high-speed sense amplifier
07/12/2005US6917551 Memory devices, sense amplifiers, and methods of operation thereof using voltage-dependent capacitor pre-amplification
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