Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
08/2005
08/17/2005CN1655278A Magnetic random access memory devices including heat generating layers and related methods
08/17/2005CN1655266A Data storage device
08/17/2005CN1215563C Semiconductor memory and semiconductor memory control method
08/17/2005CN1215480C Semiconductor memory device and control method therefor
08/17/2005CN1215464C Magnetic recorder and mfg. method thereof
08/17/2005CN1215426C Semiconductor memory device
08/16/2005US6931565 Semiconductor memory
08/16/2005US6931483 Memory device having different burst order addressing for read and write operations
08/16/2005US6931482 Semiconductor memory device internally provided with logic circuit which can be readily controlled and controlling method thereof
08/16/2005US6931479 Method and apparatus for multi-functional inputs of a memory device
08/16/2005US6930955 Method and apparatus for establishing and maintaining desired read latency in high-speed DRAM
08/16/2005US6930954 Non-volatile semiconductor memory device
08/16/2005US6930953 Self-timed strobe generator and method for use with multi-strobe random access memories to increase memory bandwidth
08/16/2005US6930952 Method of reading memory device in page mode and row decoder control circuit using the same
08/16/2005US6930950 Semiconductor memory device having self-precharge function
08/16/2005US6930947 Power source detector
08/16/2005US6930946 Refresh control and internal voltage generation in semiconductor memory device
08/16/2005US6930945 Semiconductor memory device and control method thereof
08/16/2005US6930944 System and method for power saving memory refresh for dynamic random access memory devices after an extended interval
08/16/2005US6930943 Methods, circuits, and systems for refreshing memory cells in a memory device that have different refresh periods
08/16/2005US6930942 Method and apparatus for measuring current as in sensing a memory cell
08/16/2005US6930941 Semiconductor memory device having potential amplitude of global bit line pair restricted to partial swing
08/16/2005US6930940 Semiconductor memory device with read and/or write column select gate
08/16/2005US6930938 Semiconductor memory device having test mode
08/16/2005US6930935 Redundancy circuit and semiconductor device using the same
08/16/2005US6930932 Data signal reception latch control using clock aligned relative to strobe signal
08/16/2005US6930929 Simultaneous read-write memory cell at the bit level for a graphics display
08/16/2005US6930924 Nonvolatile memory and method of programming the same memory
08/16/2005US6930922 Reading circuit, reference circuit, and semiconductor memory device
08/16/2005US6930919 NAND-type flash memory device having array of status cells for storing block erase/program information
08/16/2005US6930918 Semiconductor device
08/16/2005US6930915 Cross-point MRAM array with reduced voltage drop across MTJ's
08/16/2005US6930914 Methods for isolating memory elements within an array
08/16/2005US6930913 Contact structure, phase change memory cell, and manufacturing method thereof with elimination of double contacts
08/16/2005US6930912 Magnetic memory and driving method therefor
08/16/2005US6930911 Magnetic memory device, method for writing on the same and method for reading from the same
08/16/2005US6930910 Magnetic random access memory cell device using magnetic tunnel junction
08/16/2005US6930908 Semiconductor integrated circuit device having ferroelectric capacitor
08/16/2005US6930907 FeRAM semiconductor memory
08/16/2005US6930906 Ferroelectric memory and operating method therefor, and memory device
08/16/2005US6930905 Voltage boosting device for a ferroelectric memory device
08/16/2005US6930540 Integrated circuit with voltage divider and buffered capacitor
08/16/2005US6930536 Voltage booster
08/16/2005US6930535 High voltage supply circuit and a method of supplying high voltage
08/16/2005US6930525 Methods and apparatus for delay circuit
08/16/2005US6930370 Memory with conductors between or in communication with storage units
08/16/2005US6930369 Thin film device and a method of providing thermal assistance therein
08/16/2005US6930339 Ferroelectric memory and electronic apparatus
08/16/2005US6929957 Magnetic random access memory designs with patterned and stabilized magnetic shields
08/16/2005US6929352 Inkjet printhead chip for use with a pulsating pressure ink supply
08/16/2005CA2317765C A microcontroller including a single memory module having a data memory sector and a code memory sector and supporting simultaneous read/write access to both sectors
08/11/2005WO2005073981A1 Programming non-volatile memory
08/11/2005WO2005073980A1 Charge packet metering for coarse /fine programming of non-volatile memory
08/11/2005WO2005073978A1 Method of reading nand memory to compensate for coupling between storage elements
08/11/2005WO2005073977A2 Variable current sinking for coarse/fine programming of non-volatile memory
08/11/2005WO2005073976A1 Molecular memory devices and methods
08/11/2005WO2005073975A2 Efficient verification for coarse/fine programming of non-volatile memory
08/11/2005WO2005073788A1 Relaxer ferroelectric solid-solution single crystal and device and method of using the device
08/11/2005WO2005072472A2 Method of manufacturing non-volatile dram
08/11/2005WO2005064783A3 Tuneable spin torque device for generating an oscillating signal and method for tuning
08/11/2005WO2004003923A3 Memory having a precharge circuit and method therefor
08/11/2005US20050177781 Method and apparatus for accessing memory
08/11/2005US20050175323 Data recording method and data recording device
08/11/2005US20050175086 Nonvolatile memory device using hybrid switch cell
08/11/2005US20050174878 Semiconductor memory module, memory system, circuit, semiconductor device, and DIMM
08/11/2005US20050174875 Semiconductor storage device
08/11/2005US20050174873 Semiconductor memory device and method of operating same
08/11/2005US20050174872 Line drivers that fits within a specified line pitch
08/11/2005US20050174871 Integrated circuit devices having reducing variable retention characteristics
08/11/2005US20050174870 SRAM device
08/11/2005US20050174868 Nonvolatile semiconductor memory device
08/11/2005US20050174867 Semiconductor memory device and connecting method of sense amplifier
08/11/2005US20050174866 Semiconductor integrated circuit device
08/11/2005US20050174864 Voltage regulating circuit and method of regulating voltage
08/11/2005US20050174862 Semiconductor memory device and method of testing semiconductor memory device
08/11/2005US20050174858 Semiconductor memory device and data read and write method of the same
08/11/2005US20050174856 Program correction methods and devices using the same
08/11/2005US20050174853 Two-phase programming of a flash memory
08/11/2005US20050174852 Self-boosting system for flash memory cells
08/11/2005US20050174851 Nonvolatile memory cell with multiple floating gates formed after the select gate
08/11/2005US20050174848 Self-timed sneak current cancellation
08/11/2005US20050174847 Nrom flash memory cell with integrated dram
08/11/2005US20050174846 Thin film transistor array panel for display
08/11/2005US20050174845 Semiconductor device
08/11/2005US20050174844 Multi-bit-per-cell flash EEPROM memory with refresh
08/11/2005US20050174843 Semiconductor memory device having memory cells with floating gates and memory cell threshold voltage control method
08/11/2005US20050174842 EEPROMS using carbon nanotubes for cell storage
08/11/2005US20050174841 Electronic memory with tri-level cell pair
08/11/2005US20050174840 Memory device
08/11/2005US20050174839 Nonvolatile memory device using serial diode cell
08/11/2005US20050174838 MRAM memory cell having a weak intrinsic anisotropic storage layer and method of producing the same
08/11/2005US20050174837 Logic-in-memory circuit using magnetoresistive element
08/11/2005US20050174836 Multilayer pinned reference layer for a magnetic storage device
08/11/2005US20050174835 Multi-resistive state element with reactive metal
08/11/2005US20050174834 Magnetic tunneling junction cell having a free magnetic layer with a low magnetic moment and magnetic random access memory having the same
08/11/2005US20050174833 Semiconductor integrated circuit device
08/11/2005US20050174832 Ferroelectric-type nonvolatile semiconductor memory and operation method thereof
08/11/2005US20050174831 Ferroelectric random access memory device and control method thereof
08/11/2005US20050174830 Reference voltage generating apparatus for use in a ferroelectric random access memory (FRAM) and a driving method therefor
08/11/2005US20050174828 Switching of MRAM devices having soft magnetic reference layers
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