Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
06/2005
06/30/2005US20050141272 Non-volatile memory device and drive method thereof
06/30/2005US20050141270 Nonvolatile memory device having circuit for stably supplying desired current during data writing
06/30/2005US20050141269 Electrically programmable resistance cross point memory circuit
06/30/2005US20050141268 SRAM devices and methods of fabricating the same
06/30/2005US20050141267 Non-volatile static random access memory
06/30/2005US20050141266 Semiconductor device
06/30/2005US20050141265 Semiconductor memory device
06/30/2005US20050141262 Semiconductor memory device for dynamically storing data with channel body of transistor used as storage node
06/30/2005US20050141261 Set programming methods and write driver circuits for a phase-change memory array
06/30/2005US20050141260 Semiconductor memory device
06/30/2005US20050141259 Method for manufacturing NAND type nonvolatile ferroelectric memory cell
06/30/2005US20050141258 FeRAM for high speed sensing
06/30/2005US20050140969 Semiconductor memory device for reducing current consumption in operation
06/30/2005US20050140745 Ink jet nozzle to eject ink
06/30/2005US20050140727 Inkjet printhead having nozzle plate supported by encapsulated photoresist
06/30/2005US20050140408 Delay locked loop in semiconductor memory device and locking method thereof
06/30/2005US20050140405 Power-up circuit semiconductor memory device
06/30/2005US20050140404 Power-up circuit in semiconductor memory device
06/30/2005US20050140349 Apparatus and method for managing voltage buses
06/30/2005US20050139977 Semiconductor integrated circuit device
06/30/2005US20050139902 Non-volatile memory device
06/30/2005US20050139884 Memory cell having improved interconnect
06/30/2005US20050139883 Magnetic memory storage device
06/30/2005US20050139882 Electronic device and method of manufacturing the same
06/30/2005US20050139880 Method for manufacturing magnetic random access memory
06/30/2005US20050139684 Flexible display assembly having flexibly connected screen
06/30/2005DE4428647B4 Halbleiterspeicherbauelement mit einer Struktur zur Ansteuerung von Eingabe/Ausgabeleitungen mit hoher Geschwindigkeit A semiconductor memory device having a structure for control of input / output lines at a high speed
06/30/2005DE19834415B4 Halbleiterspeichervorrichtung A semiconductor memory device
06/30/2005DE10357862B3 Verfahren zur Herstellung eines integrierten Speicherbausteins A method for manufacturing an integrated memory device
06/30/2005DE102004056971A1 Doppelleistungserfassungsschema für eine Speichervorrichtung Double power detection scheme for a memory device
06/30/2005DE102004049868A1 Halbleitervorrichtung in Stapelanordnung und Steuerverfahren für Halbleiterchips Semiconductor device stack assembly and control method for semiconductor chips
06/30/2005DE102004048652A1 Halbleiterspeicherbaustein und Verfahren zu dessen Herstellung Semiconductor memory device and method for its production
06/30/2005DE102004039213A1 Molekulare optoelektronische Speichervorrichtung Molecular optoelectronic storage device
06/30/2005DE102004033159A1 Erwärmen von MRAM-Zellen, um ein Umschalten zwischen Zuständen zu erleichtern Heating of MRAM cells in order to facilitate switching between states
06/30/2005DE102004031140A1 Speichervorrichtung Memory device
06/30/2005DE102004025922A1 Die Laufwerks-Betriebszeit optimierendes Plattenarray The drive operating time optimizing disk array
06/29/2005EP1548842A2 Non-volatile multibit memory cell and method of manufacturing thereof
06/29/2005EP1548833A1 Ferroelectric memory and its manufacturing method
06/29/2005EP1548832A1 Magnetoresistive random-access memory device
06/29/2005EP1548762A2 Magnetoresistive element, magnetic head, magnetic reproducing apparatus, and magnetic memory
06/29/2005EP1548747A1 Content addressed memory with comprising hierarchically structured match-lines and with search function based on conversion of decimals into blocks of bits
06/29/2005EP1548744A1 Fast reading, low power consumption memory device and reading method thereof
06/29/2005EP1548702A1 Method for ultra-fast controlling of a magnetic cell and related devices
06/29/2005EP1547148A2 Spacer integration scheme in mram technology
06/29/2005EP1547101A1 Amorphous alloys for magnetic devices
06/29/2005EP1547094A1 Method and circuitry for identifying weak bits in an mram
06/29/2005EP1547092A1 Chain memory architecture
06/29/2005EP1547091A1 A method for operating a ferroelectric or electret memory device, and a device of this kind
06/29/2005EP1547090A1 Magnetic random access memory having a vertical write line
06/29/2005EP1547089A2 Reconfigurable electronic device having interconnected data storage devices
06/29/2005EP1547088A1 System for controlling mode changes in a voltage down-converter
06/29/2005EP1546845A2 One button external backup
06/29/2005CN1633694A Using multiple status bits per cell for handling power failures during write operations
06/29/2005CN1632964A Magnetic tunnel junction having high magnetoresistance effect and method for making same
06/29/2005CN1208833C Single transistor type magnetic random access memory and its operating and manufacturing method
06/29/2005CN1208828C Erase method for non-volatile memory
06/29/2005CN1208780C 非挥发性存储器电路 Non-volatile memory circuit
06/28/2005US6912666 Interleaved delay line for phase locked and delay locked loops
06/28/2005US6912620 Memory device which receives write masking information
06/28/2005US6912175 Semiconductor memory and method of controlling the same
06/28/2005US6912174 Thin film magnetic memory device suppressing influence of magnetic field noise from power supply wiring
06/28/2005US6912169 Synchronous semiconductor memory device
06/28/2005US6912168 Non-contiguous masked refresh for an integrated circuit memory
06/28/2005US6912167 Sensing circuit
06/28/2005US6912165 Method for transparent updates of output driver impedance
06/28/2005US6912161 Nonvolatile semiconductor memory device
06/28/2005US6912157 Semiconductor memory device using only single-channel transistor to apply voltage to selected word line
06/28/2005US6912156 Clock synchronized nonvolatile memory device
06/28/2005US6912155 Non volatile memory
06/28/2005US6912154 Magnetic random access memory
06/28/2005US6912152 Magnetic random access memory
06/28/2005US6912151 Negative differential resistance (NDR) based memory device with reduced body effects
06/28/2005US6912150 Reference current generator, and method of programming, adjusting and/or operating same
06/28/2005US6912149 Ferroelectric memory device and method for reading data from the same
06/28/2005US6912148 Magnetic semiconductor memory and the reading method using spin-polarized electron beam
06/28/2005US6912146 Using an MOS select gate for a phase change memory
06/28/2005US6911846 Method and apparatus for a 1 of N signal
06/28/2005US6911710 Multi-bit magnetic memory cells
06/28/2005US6911709 Method of manufacturing a magnetic tunnel junction device
06/28/2005US6911703 Semiconductor integrated circuit device operating with low power consumption
06/28/2005US6911685 Thermally-assisted magnetic memory structures
06/28/2005US6911682 Electromechanical three-trace junction devices
06/28/2005US6911156 Methods for fabricating MRAM device structures
06/28/2005CA2403859C Multidimensional addressing architecture for electronic devices
06/28/2005CA2231377C Second-layer phase change memory array on top of a logic device
06/23/2005WO2005057585A2 Nand memory array incorporating multiple write pulse programming of individual memory cells and method for operation of same
06/23/2005WO2005057582A1 A memory device, an information storage process, a process, and a structured material
06/23/2005WO2005029499A3 Low power programming technique for a floating body memory transistor, memory cell, and memory array
06/23/2005WO2005020251A3 High speed low power magnetic devices based current induced spin-momentum transfer
06/23/2005WO2004064071A3 Tamper-resistant packaging and approach using magnetically-set data
06/23/2005US20050138537 Method and system to encode and decode wide data words
06/23/2005US20050138482 Method and apparatus for reducing soft errors
06/23/2005US20050138457 Synchronization devices having input/output delay model tuning elements
06/23/2005US20050138456 Semiconductor memory device for reducing address access time
06/23/2005US20050138277 Data control circuit for DDR SDRAM controller
06/23/2005US20050138275 Digital signal processor
06/23/2005US20050138269 Memory apparatus having multi-port architecture for supporting multi processor
06/23/2005US20050136600 Magnetic elements with ballistic magnetoresistance utilizing spin-transfer and an MRAM device using such magnetic elements
06/23/2005US20050136555 Method of manufacturing semiconductor device
06/23/2005US20050135519 Apparatus for canceling intersymbol interference in semiconductor memory device and method thereof
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