| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 07/28/2005 | US20050162185 Flip-flop circuit having majority-logic circuit |
| 07/28/2005 | US20050161715 Cross point resistive memory array |
| 07/28/2005 | US20050160585 Magnetoresistive memory device and method for fabricating the same |
| 07/28/2005 | DE102004063206A1 Schaltungsanordnung und Verfahren zur ISI-Löschung Circuit arrangement and method for ISI cancellation |
| 07/28/2005 | DE102004062451A1 Line layout for semiconductor memory device e.g. dynamic RAM, has conductive line arranged in the same direction as word lines in twisted area of set of twisted bit line pairs in memory device |
| 07/28/2005 | DE102004061299A1 Eingangspuffer mit Differenzverstärker Input buffer with differential amplifier |
| 07/28/2005 | DE102004056232A1 Bistable static memory element for integrated microelectronics has laterally controlled y transistor with high input resistance |
| 07/28/2005 | DE102004040526A1 Magnetspeicherspeicherungsvorrichtung Magnetic memory storage device |
| 07/28/2005 | DE102004010353A1 Einschalt-Schaltung in einer Halbleiterspeichervorrichtung A power-up circuit in the semiconductor memory device |
| 07/27/2005 | EP1557841A2 Multilevel Resistive Memory device and its writing erasing method |
| 07/27/2005 | EP1557840A1 Memory device, motion vector detection device, and detection method |
| 07/27/2005 | EP1556864A2 Patterning metal stack layers of magnetic switching device, utilizing a bilayer metal hardmask |
| 07/27/2005 | EP1556863A1 Magnetic tunnel junction memory cell architecture |
| 07/27/2005 | EP1556862A2 Magnetic memory device |
| 07/27/2005 | CN1647292A Silver-selenide/chalcogenide glass stack for resistance variable memory |
| 07/27/2005 | CN1647273A Interconnection structure and methods |
| 07/27/2005 | CN1647215A System and method for generating a reference voltage based on averaging the voltages of two complementary programmed dual bit reference cells |
| 07/27/2005 | CN1647212A Data storage device and refreshing method for use with such device |
| 07/27/2005 | CN1647211A Semiconductor storing device |
| 07/27/2005 | CN1647210A Programmable conductor random access memory and method for sensing same |
| 07/27/2005 | CN1647209A Multiple data state memory cell |
| 07/27/2005 | CN1647208A Synthetic-ferrimagnet sense-layer for high density MRAM applications |
| 07/27/2005 | CN1647207A Storage device using resistance varying storage element and reference resistance value decision method for the device |
| 07/27/2005 | CN1647206A Material combinations for tunnel junction cap layer, tunnel junction hard mask and tunnel junction stack seed layer in mram processing |
| 07/27/2005 | CN1647205A Memory chip architecture having non-rectangular memory banks and method for arranging memory banks |
| 07/27/2005 | CN1647204A Method of performing access to a single-port memory device, memory access device, integrated circuit device and method of use of an integrated circuit device |
| 07/27/2005 | CN1647049A Pipelined parallel programming operation in a non-volatile memory system |
| 07/27/2005 | CN1647045A Methods for storing data in non-volatile memories |
| 07/27/2005 | CN1645618A Semiconductor memory device and making method thereof |
| 07/27/2005 | CN1645610A Stacked layered type semiconductor memory device |
| 07/27/2005 | CN1645514A Semiconductor device |
| 07/27/2005 | CN1645513A Semiconductor memory circuit and method for operating the same in a standby mode |
| 07/27/2005 | CN1645512A Memory device of ferro-electric |
| 07/27/2005 | CN1645511A Stacked layered type semiconductor memory device |
| 07/27/2005 | CN1212666C Semiconductor memory |
| 07/27/2005 | CN1212664C Flat non-volatile semiconductor storage element |
| 07/27/2005 | CN1212619C Semiconductor storage device of high speed buffer memory device |
| 07/26/2005 | US6922799 Semiconductor memory device and testing system and testing method |
| 07/26/2005 | US6922758 Synchronous flash memory with concurrent write and read operation |
| 07/26/2005 | US6922750 Semiconductor memory device capable of simultaneously reading data and refreshing data |
| 07/26/2005 | US6922372 Synchronous semiconductor memory device having stable data output timing |
| 07/26/2005 | US6922371 Semiconductor storage device |
| 07/26/2005 | US6922370 High performance SRAM device and method of powering-down the same |
| 07/26/2005 | US6922369 Semiconductor memory device with self-refresh device for reducing power consumption |
| 07/26/2005 | US6922368 Apparatus and structure for rapid enablement |
| 07/26/2005 | US6922367 Data strobe synchronization circuit and method for double data rate, multi-bit writes |
| 07/26/2005 | US6922365 Read-out circuit for a dynamic memory circuit, memory cell array, and method for amplifying and reading data stored in a memory cell array |
| 07/26/2005 | US6922364 Non-volatile semiconductor memory device and electric device with the same |
| 07/26/2005 | US6922363 Method for operating a NOR-array memory module composed of P-type memory cells |
| 07/26/2005 | US6922358 Segmented metal bitlines |
| 07/26/2005 | US6922356 Method of operation for a programmable circuit |
| 07/26/2005 | US6922355 Thin film magnetic memory device capable of conducting stable data read and write operations |
| 07/26/2005 | US6922354 Semiconductor memory device |
| 07/26/2005 | US6922352 FeRAM having test circuit and method for testing the same |
| 07/26/2005 | US6922350 Reducing the effect of write disturbs in polymer memories |
| 07/26/2005 | US6922094 Data retaining circuit |
| 07/26/2005 | US6921965 Die surface magnetic field shield |
| 07/26/2005 | US6921954 Asymmetric patterned magnetic memory |
| 07/26/2005 | US6921953 Self-aligned, low-resistance, efficient MRAM read/write conductors |
| 07/26/2005 | US6921692 Methods of forming memory circuitry |
| 07/26/2005 | US6921221 Combination keyboard and printer apparatus |
| 07/21/2005 | WO2005067147A1 Apparatus and method of error detection and correction in a radiation-hardened static random access memory field-programmable gate array |
| 07/21/2005 | WO2005067052A1 Magnetic memory cell and magnetic memory device |
| 07/21/2005 | WO2005067031A1 Ferroelectric thin films and devices comprising thin ferroelectric films |
| 07/21/2005 | WO2005066972A1 Non-volatile memory and method with block management system |
| 07/21/2005 | WO2005066970A2 Robust data duplication and improved update method in a multibit non-volatile memory |
| 07/21/2005 | WO2005066969A1 Memory device, memory circuit and semiconductor integrated circuit having variable resistance |
| 07/21/2005 | WO2005066968A1 Memory system segemented power supply and control |
| 07/21/2005 | WO2005066967A1 Method and apparatus for multiple row caches per bank |
| 07/21/2005 | WO2005066792A2 Non-volatile memory and method with memory planes alignment |
| 07/21/2005 | WO2005050654A3 Back-bias voltage generator with temperature control |
| 07/21/2005 | WO2005006376A3 Electronic device with aperture and wide lens for small emission spot size |
| 07/21/2005 | WO2004053881A3 Source-biased memory cell array |
| 07/21/2005 | US20050160245 Novel FIFO memory architecture and method for the management of the same |
| 07/21/2005 | US20050160241 High performance cost optimized memory |
| 07/21/2005 | US20050158992 Cladded conductor for use in a magnetoelectronics device and method for fabricating the same |
| 07/21/2005 | US20050158952 Mram devices with fine tuned offset |
| 07/21/2005 | US20050158951 Methods of fabricating semiconductor memory devices including different dielectric layers for the cell transistors and refresh transistors thereof |
| 07/21/2005 | US20050158950 Non-volatile memory cell comprising a dielectric layer and a phase change material in series |
| 07/21/2005 | US20050158882 Method of forming nano-sized MTJ cell without contact hole |
| 07/21/2005 | US20050158881 Method of making toroidal mram cells |
| 07/21/2005 | US20050158043 Printing cartridge with ink and print media supplies |
| 07/21/2005 | US20050157827 Method and circuit for writing double data rate (DDR) sampled data in a memory device |
| 07/21/2005 | US20050157586 Arrangement comprising a memory device and a program-controlled unit |
| 07/21/2005 | US20050157585 Memory control device and memory control method |
| 07/21/2005 | US20050157582 Semiconductor memory device with reduced power consumption for refresh operation |
| 07/21/2005 | US20050157580 Semiconductor memory device and method of operating same |
| 07/21/2005 | US20050157579 Memory device supporting a dynamically configurable core organization |
| 07/21/2005 | US20050157578 Semiconductor memory device |
| 07/21/2005 | US20050157577 Concurrent refresh mode with distributed row address counters in an embedded DRAM |
| 07/21/2005 | US20050157576 Semiconductor memory device and refresh method for the same |
| 07/21/2005 | US20050157574 Semiconductor memory device and method of controlling the semiconductor memory device |
| 07/21/2005 | US20050157567 Multiple data state memory cell |
| 07/21/2005 | US20050157566 Semiconductor device with circuit for detecting abnormal waveform of signal and preventing the signal from being transmitted |
| 07/21/2005 | US20050157564 Non-volatile semiconductor memory device and electric device with the same |
| 07/21/2005 | US20050157563 Memory Device and mobile communication device using a specific access procedure |
| 07/21/2005 | US20050157559 Impulsive driving liquid crystal display and driving method thereof |
| 07/21/2005 | US20050157556 Nonvolatile memory |
| 07/21/2005 | US20050157555 Nonvolatile semiconductor memory device |
| 07/21/2005 | US20050157553 Integrated memory device with multi-sector selection commands |