Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
08/2005
08/11/2005US20050174827 [device and method for compensating defect in semiconductor memory]
08/11/2005US20050174821 Multi-stage per cell magnetoresistive random access memory
08/11/2005US20050174164 Integrated semiconductor memory with temperature-dependent voltage generation
08/11/2005US20050174144 Look-up table
08/11/2005US20050174141 Semiconductor integrated circuit device with reduced leakage current
08/11/2005US20050173771 Switching of soft reference layers of magnetic memory devices
08/11/2005US20050173751 Semiconductor memory device
08/11/2005US20050173746 Use of gate electrode workfunction to improve DRAM refresh
08/11/2005US20050173540 System and method of authentifying
08/11/2005US20050173372 Method of fabricating inkjet nozzle chambers
08/11/2005DE19925881B4 Integrierter Speicher mit in Kreuzungspunkten von Wortleitungen und Bitleitungen angeordneten Speicherzellen Integrated memory having arranged at crossover points of word lines and bit lines of memory cells
08/11/2005DE102005001175A1 Speicher mit automatischer Auffrischung bei bestimmten Bänken Memory with automatic refresh of certain banks
08/11/2005DE102004063581A1 Halbleiterelement Semiconductor element
08/11/2005DE102004062194A1 Integrierte Halbleiterschaltungs-Vorrichtung A semiconductor integrated circuit device
08/11/2005DE102004060712A1 Datenspeichervorrichtung The data storage device
08/11/2005DE102004060645A1 Weichreferenz-Vierleiter-Magnetspeichervorrichtung Soft reference four-wire magnetic memory device
08/11/2005DE102004022792A1 Memory circuit for data storage esp. for mobile/cell phone, has control circuit for blocking and enabling read/write functions in first and second state
08/11/2005DE102004013929B3 Control method for the reading in of a data signal to an electronic circuit input latch, especially to a DRAM circuit, whereby the delay between signal and clock flanks is set so that it is within a defined time window
08/11/2005DE102004006769B3 Auslesevorrichtung Readout device
08/10/2005EP1562200A2 Nonvolatile semiconductor memory device
08/10/2005EP1562121A2 Data management apparatus and method used for flash memory
08/10/2005EP1561222A2 A combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations
08/10/2005EP1561220A2 Programmable magnetic memory device
08/10/2005EP0997913B1 Method and circuit for testing virgin memory cells in a multilevel memory device
08/10/2005CN1653554A Increasing the effectiveness of error correction codes and operating multi-level memory systems by using information about the quality of the stored data
08/10/2005CN1653552A Serially sensing the output of multilevel cell arrays
08/10/2005CN1653550A Resistive memory elements with reduced roughness
08/10/2005CN1653549A Method of manufacturing MRAM offset cells in a damascene structure
08/10/2005CN1653494A System and method of authentifying
08/10/2005CN1652442A Booster circuit capable of switching between a conventional mode and a low consumption current mode
08/10/2005CN1652337A Sram cell and mfg. method thereof
08/10/2005CN1652325A Ferroelectric memory device and its mfg. method
08/10/2005CN1652255A Semiconductor memory device and method of testing semiconductor memory device
08/10/2005CN1652254A Nonvolatile semiconductor memory device
08/10/2005CN1652252A Semiconductor device
08/10/2005CN1652251A Method for implementing table looking-up controller in dynamic memory
08/10/2005CN1652250A Redundancy relieving circuit
08/10/2005CN1652249A Method of forming nano-sized MTJ cell without contact hole
08/10/2005CN1652248A Method and memory system in which operating mode is set using address signal
08/10/2005CN1652217A Data recording method and data recording device
08/10/2005CN1652151A Semiconductor device
08/10/2005CN1652088A Data management apparatus and method used for flash memory
08/10/2005CN1214473C Magnetic tunnel junction element and magnetic memory using it
08/10/2005CN1214414C Method of mfg. magnetic tunnel junction device
08/10/2005CN1214396C Semiconductor storage having data masking pin and storage system including the same
08/10/2005CN1214395C Memory address generator circuit and semiconductor memory device
08/10/2005CN1214394C Electric circuit device for storing unit data content value computation
08/10/2005CN1214393C Data determining circuitry and data determining method
08/10/2005CN1214392C Storing unit with improved reliability, nonvolatile memory and its controlling method
08/09/2005US6928594 Semiconductor integrated circuit
08/09/2005US6928530 Method and device for sequential readout of a memory with address jump
08/09/2005US6928527 Look ahead methods and apparatus
08/09/2005US6928512 Semiconductor device with non-volatile memory and random access memory
08/09/2005US6928376 Apparatus and methods for ferroelectric ram fatigue testing
08/09/2005US6928028 Synchronous dynamic random access memory for burst read/write operations
08/09/2005US6928027 Virtual dual-port synchronous RAM architecture
08/09/2005US6928026 Synchronous global controller for enhanced pipelining
08/09/2005US6928025 Synchronous integrated memory
08/09/2005US6928024 RAM memory circuit and method for memory operation at a multiplied data rate
08/09/2005US6928020 Semiconductor memory device
08/09/2005US6928019 Semiconductor device with self refresh test mode
08/09/2005US6928017 Semiconductor memory device
08/09/2005US6928016 Refresh type semiconductor memory device having refresh circuit for minimizing refresh fail at high speed operation
08/09/2005US6928015 Thin film magnetic memory device and semiconductor integrated circuit device including the same as one of circuit blocks
08/09/2005US6928012 Bitline equalization system for a DRAM integrated circuit
08/09/2005US6928010 Semiconductor integrated circuit device capable of tuning of internal power supply voltages generated by a plurality of internal power generating circuits
08/09/2005US6928007 ODT mode conversion circuit and method
08/09/2005US6928006 Semiconductor memory device capable of reducing noise during operation thereof
08/09/2005US6928005 Domino comparator capable for use in a memory array
08/09/2005US6928004 Semiconductor memory device
08/09/2005US6928001 Programming and erasing methods for a non-volatile memory cell
08/09/2005US6927999 Integrated circuit memory devices and methods of programming the same in which the current drawn during a programming operation is independent of the data to be programmed
08/09/2005US6927997 3-transistor OTP ROM using CMOS gate oxide antifuse
08/09/2005US6927996 Magnetic memory device
08/09/2005US6927995 Multi-bit MRAM device with switching nucleation sites
08/09/2005US6927994 Ferroelectric memory device
08/09/2005US6927993 Multi-bit ROM cell, for storing on of N>4 possible states and having bi-directional read, an array of such cells
08/09/2005US6927786 Ink jet nozzle with thermally operable linear expansion actuation mechanism
08/09/2005US6927603 Semiconductor integrated circuit having system bus divided in stages
08/09/2005US6927558 Power supply voltage lowering circuit used in semiconductor device
08/09/2005US6927468 Magnetic random access memory
08/09/2005US6927467 Magnetoresistive memory device and method for fabricating the same
08/09/2005US6927466 Magnetoresistive memory or sensor devices having improved switching properties and method of fabrication
08/09/2005US6927438 Nonvolatile ferroelectric memory device and method for fabricating the same
08/09/2005US6927437 Ferroelectric memory device
08/09/2005US6927430 Shared bit line cross-point memory array incorporating P/N junctions
08/09/2005US6927411 Programmable structure, an array including the structure, and methods of forming the same
08/09/2005US6927120 Method for forming an asymmetric crystalline structure memory cell
08/09/2005US6927093 Method for making programmable resistance memory element
08/09/2005US6927092 Method of forming a shared global word line MRAM structure
08/09/2005US6927075 Magnetic memory with self-aligned magnetic keeper structure
08/09/2005US6927074 Asymmetric memory cell
08/09/2005US6927073 Methods of fabricating magnetoresistive memory devices
08/09/2005US6927072 Method of applying cladding material on conductive lines of MRAM devices
08/04/2005WO2005071689A1 Improved magnetic switching
08/04/2005WO2005071688A1 Tunneling anisotropic magnetoresistive device and method of operation
08/04/2005WO2005048262A3 Mram architecture with a flux closed data storage layer
08/04/2005WO2005036557A3 Ac sensing for a resistive memory
08/04/2005WO2005034212A3 6t finfet cmos sram cell with an increased cell ratio
08/04/2005WO2003036734A3 Magnetoresistance effect element, magetic memory element, magnetic memory device, and their manufacturing method
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