Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
08/2005
08/23/2005US6934210 Semiconductor memory circuit
08/23/2005US6934209 Temperature compensated T-RAM memory device and method
08/23/2005US6934204 Semiconductor device with reduced terminal input capacitance
08/23/2005US6934196 Memory module with magnetoresistive elements and a method of reading data from in-row and in-column directions
08/23/2005US6934186 Semiconductor device
08/23/2005US6934185 Programming method for non volatile multilevel memory cells and corresponding programming circuit
08/23/2005US6934184 Magnetic memory
08/23/2005US6934182 Method to improve cache capacity of SOI and bulk
08/23/2005US6934181 Reducing sub-threshold leakage in a memory array
08/23/2005US6934180 Random access memory cell having reduced current leakage and having a pass transistor control gate formed in a trench
08/23/2005US6934179 Semiconductor integrated circuit device and bit line capacitance adjusting method using the device
08/23/2005US6934178 Nonvolatile data storage circuit using ferroelectric capacitors
08/23/2005US6934177 Ferroelectric memory device and read control method thereof
08/23/2005US6934175 Ferroelectric-type nonvolatile semiconductor memory
08/23/2005US6934173 256 Meg dynamic random access memory
08/23/2005US6934130 Magnetic device having shaped ferromagnetic film
08/23/2005US6933578 Semiconductor storage device
08/23/2005US6933550 Method and system for providing a magnetic memory having a wrapped write line
08/23/2005US6933517 Tunneling emitters
08/23/2005US6932459 Ink jet printhead
08/18/2005WO2005076356A1 Layered crossbar memory connected to integrated circuit
08/18/2005WO2005076143A1 System and method for detecting the width of a data bus
08/18/2005WO2005074386A2 Two-phase programming of a flash memory
08/18/2005WO2005057585A3 Nand memory array incorporating multiple write pulse programming of individual memory cells and method for operation of same
08/18/2005WO2005008672B1 Asynchronous static random access memory
08/18/2005US20050181554 Semiconductor memory device and method for initializing the same
08/18/2005US20050180254 Method of performing access to a single-port memory device, memory access device, integrated circuit device and method of use of an integrated circuit device
08/18/2005US20050180252 Method and apparatus for saving current in a memory device
08/18/2005US20050180249 Memory array and method with simultaneous read/write capability
08/18/2005US20050180246 High speed DRAM architecture with uniform access latency
08/18/2005US20050180243 Semiconductor device
08/18/2005US20050180242 Semiconductor storage device
08/18/2005US20050180241 Pseudo static random access memory and data refresh method thereof
08/18/2005US20050180239 Method and system for providing temperature dependent programming for magnetic memories
08/18/2005US20050180238 Controlled temperature, thermal-assisted magnetic memory device
08/18/2005US20050180235 Memory device with different termination units for different signal frequencies
08/18/2005US20050180229 On die termination mode transfer circuit in semiconductor memory device and its method
08/18/2005US20050180225 Graphics Controller Integrated Circuit without Memory Interface
08/18/2005US20050180224 Differential current-mode sensing methods and apparatuses for memories
08/18/2005US20050180222 Semiconductor memory device
08/18/2005US20050180220 Non-destructive readout of ferroelectric memories
08/18/2005US20050180218 Voltage discharge technique for controlling threshold-voltage characteristics of floating-gate transistor in circuitry such as flash eprom
08/18/2005US20050180217 Nonvolatile memory cell with multiple floating gates formed after the select gate
08/18/2005US20050180211 Novel multi-state memory
08/18/2005US20050180210 Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements
08/18/2005US20050180209 Method of managing a multi-bit-cell flash memory
08/18/2005US20050180208 Skewed sense AMP for variable resistance memory sensing
08/18/2005US20050180207 Non-volatile memory element and process for manufacturing the same
08/18/2005US20050180206 System and method for detecting the width of a data bus
08/18/2005US20050180205 Magnetic random access memory and method of reading data from the same
08/18/2005US20050180204 Magnetic memory device and method of reading information
08/18/2005US20050180203 Segmented MRAM memory array
08/18/2005US20050180202 Method and system for providing heat assisted switching of a magnetic element utilizing spin transfer
08/18/2005US20050180201 Method and system for performing more consistent switching of magnetic elements in a magnetic memory
08/18/2005US20050180200 Bit line control for low power in standby
08/18/2005US20050180198 Semiconductor device and method of fabricating the same
08/18/2005US20050180197 Output device for static random access memory
08/18/2005US20050180195 Memory device using nano tube cell
08/18/2005US20050180194 Nano tube cell and memory device using the same
08/18/2005US20050180193 Memory device using multiple layer nano tube cell
08/18/2005US20050180192 Ferroelectric-type nonvolatile semiconductor memory
08/18/2005US20050180190 Data structure design system and method for prolonging the life of an FRAM
08/18/2005US20050180189 Memory device electrode with a surface structure
08/18/2005US20050180186 Shield plate for limiting cross coupling between floating gates
08/18/2005US20050179781 Digital camera having functionally interconnected image processing elements
08/18/2005US20050179733 Inkjet printhead chip with nozzle assemblies incorporating fluidic seals
08/18/2005US20050179722 Inkjet printer comprising pagewidth printhead and reciprocally movable capping member
08/18/2005US20050179492 Memory component with improved noise insensitivity
08/18/2005US20050179478 Device to be used in the synchronization of clock pulses, as well as a clock pulse synchronization process
08/18/2005US20050179461 Semiconductor memory circuit and method for operating the same in a standby mode
08/18/2005US20050179094 SRAM cell and method of manufacturing the same
08/18/2005US20050179079 Nor-type channel-program channel-erase contactless flash memory on SOI
08/18/2005US20050179070 Junction-isolated depletion mode ferroelectric memory devices and systems
08/18/2005US20050179058 Semiconductor memory device and defect remedying method thereof
08/18/2005US20050179033 Memory cell, method for the production thereof and use of a composition therefor
08/18/2005US20050178846 Data storage device incorporating a two-dimensional code
08/18/2005DE10297786T5 Programmierung eines Phasenübergangsmaterialspeichers Programming a phase change material storage
08/18/2005DE102004039236A1 Magnetic RAM cell read operation performing method for use in data storage device, involves determining whether voltage change is occurred at node between two RAM cells based on applying write sense current across one cell
08/18/2005DE102004039235A1 Read operation performing method for use in memory cell string, involves applying write sense current across magnetic random access memory cell, and determining whether one voltage across string differs from another voltage
08/17/2005EP1564950A1 Timing signal generator
08/17/2005EP1564949A1 Reduction of common mode signals
08/17/2005EP1564948A1 Digital transmission with controlled rise and fall times
08/17/2005EP1564752A1 Multi-level memory
08/17/2005EP1564751A1 Information storage device, information storage method, and information storage program
08/17/2005EP1564750A2 Magnetic random access memory and method of reading data from the same
08/17/2005EP1564749A2 Multi-port memory based on DRAM core
08/17/2005EP1564748A2 Multi-port memory based on DRAM core
08/17/2005EP1564747A1 Semiconductor memory device comprising simultaneous block activation means and method of testing semiconductor memory device
08/17/2005EP1563509A2 Spin driven resistors and nanogates
08/17/2005EP1495470B1 Material combinations for tunnel junction cap layer, tunnel junction hard mask and tunnel junction stack seed layer in mram processing
08/17/2005CN2718734Y Static random access memory unit with multiple gride transistor
08/17/2005CN1656580A Method of forming mram devices
08/17/2005CN1656568A Data storage device
08/17/2005CN1656567A Method of erasing a flashing memory using a pre-erasing step
08/17/2005CN1656565A Memory array having 2T memory cells
08/17/2005CN1656564A Reference voltage generation for memory circuits
08/17/2005CN1655359A Plane decoding method and device for three dimensional memories
08/17/2005CN1655357A Semiconductor memory device and method for making same
08/17/2005CN1655280A Semiconductor storage device and refresh control method therefor
08/17/2005CN1655279A On die termination mode transfer circuit in semiconductor memory device and its method
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