Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
06/2005
06/09/2005US20050122800 Semiconductor integrated circuit device
06/09/2005US20050122796 Delayed locked loop in semiconductor memory device and its control method
06/09/2005US20050122795 Semiconductor integrated circuit device
06/09/2005US20050122792 Method and apparatus for enhanced sensing of low voltage memory
06/09/2005US20050122789 Memory device and method having data path with multiple prefetch I/O configurations
06/09/2005US20050122784 Methods of fabricating floating trap non-volatile semiconductor memory devices including high dielectric constant blocking insulating layers
06/09/2005US20050122782 Semiconductor memory device
06/09/2005US20050122780 NAND memory array incorporating multiple write pulse programming of individual memory cells and method for operation of same
06/09/2005US20050122776 Novel monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout
06/09/2005US20050122774 Thin film magnetic memory device having redundant configuration
06/09/2005US20050122773 Self-aligned, low-ressistance, efficient memory array
06/09/2005US20050122772 MRAM device integrated with other types of circuitry
06/09/2005US20050122771 Memory device and method of operating same
06/09/2005US20050122770 Method to reduce switch threshold of soft magnetic films
06/09/2005US20050122769 Magnetic memory device
06/09/2005US20050122768 Nonvolatile semiconductor memory device
06/09/2005US20050122767 Memory device
06/09/2005US20050122766 Digital control logic circuit having a characteristic of time hysteresis
06/09/2005US20050122765 Reference cell configuration for a 1T/1C ferroelectric memory
06/09/2005US20050122764 Semiconductor integrated circuit device
06/09/2005US20050122763 Ferroelectric memory device and electronic apparatus
06/09/2005US20050122762 FeRAM having differential data
06/09/2005US20050122761 FeRAM having wide page buffering function
06/09/2005US20050122757 Memory architecture and method of manufacture and operation thereof
06/09/2005US20050122399 Portable camera with inbuilt printer device
06/09/2005US20050122148 Circuit for controlling pulse width
06/09/2005US20050121810 Dual port memory core cell architecture with matched bit line capacitances
06/09/2005US20050121809 Information storage apparatus and electronic device in which information storage apparatus is installed
06/09/2005US20050121712 Flash memory cell and method of manufacturing the same and programming/erasing/reading method of flash memory cell
06/09/2005US20050121664 Silicon on insulator (SOI) negative differential resistance (NDR) based memory device with reduced body effects
06/09/2005US20050121659 Non-volatile memory and the fabrication method thereof
06/09/2005US20050120552 Method of fabricating monolithic microelectromechanical fluid ejection device
06/09/2005DE10350161A1 Magnetoresistive Speicherzelle und Verfahren zu deren Herstellung Magnetoresistive memory cell and process for their preparation
06/09/2005DE10339787A1 Speichermodul und Verfahren zum Betreiben eines Speichermoduls Memory module and method of operating a memory module
06/09/2005DE10300690B4 Digitale DLL-Vorrichtung zum Korrigieren des Tastverhältnisses und dessen Verfahren Digital DLL apparatus for correcting the duty cycle and the process
06/09/2005DE102004052803A1 Halbleiterbauelement mit Lesesignalgenerator und zugehöriges Datenleseverfahren A semiconductor device comprising read signal generator and related data reading method
06/08/2005EP1538631A1 Regulating a magnetic memory cell write current
06/08/2005EP1538630A1 Memory module and memory-assist module
06/08/2005EP1538600A2 Display controller with display memory circuit
06/08/2005EP1538370A2 Transmission control system
06/08/2005EP1537668A1 Synchronous mirror delay (smd) circuit and method including a ring oscillator for timing coarse and fine delay intervals
06/08/2005EP1537584A1 Programming a phase-change material memory
06/08/2005EP1537583A1 Device writing to a plurality of rows in a memory matrix simultaneously
06/08/2005EP1537582A1 Method and apparatus for setting and compensating read latency in a high speed dram
06/08/2005CN1625838A Logical operation circuit and logical operation method
06/08/2005CN1625837A Logical operation circuit and logical operation method
06/08/2005CN1625476A Pusher actuation in a printhead chip for an inkjet printhead
06/08/2005CN1625473A Wide format pagewidth inkjet printer
06/08/2005CN1625472A A print assembly for a wide format pagewidth printer
06/08/2005CN1625471A Processing of images for high volume pagewidth printing
06/08/2005CN1624923A Semiconductor device and method of fabricating the same
06/08/2005CN1624803A 半导体集成电路装置 The semiconductor integrated circuit device
06/08/2005CN1624802A Semiconductor memory device and cache
06/08/2005CN1624801A Pseudo-static DASD and its data refresh method
06/08/2005CN1624800A 半导体存储装置及其控制方法 Semiconductor memory device and control method
06/08/2005CN1624799A Memory device with programmable receivers to improve performance
06/08/2005CN1624798A Methods and apparatus for writing an LRU bit
06/08/2005CN1624796A Sense amplifier control circuit of semiconductor memory device
06/08/2005CN1624740A Display controller with display memory circuit
06/08/2005CN1624358A Transmission control system
06/08/2005CN1205617C Buff circuit
06/08/2005CN1205616C Integrated memory with memory cells and reference cells and operating method for memory of this type
06/07/2005US6904552 Circuit and method for test and repair
06/07/2005US6904536 Semiconductor circuit and functional block including synchronizing circuit for determining operation timing
06/07/2005US6903996 Very small swing high performance CMOS static memory (multi-port register file) with power reducing column multiplexing scheme
06/07/2005US6903994 Device, system and method for reducing power in a memory device during standby modes
06/07/2005US6903993 Memory cell with fuse element
06/07/2005US6903990 Refresh control for semiconductor memory device
06/07/2005US6903989 Data sensing circuits and methods for magnetic memory devices
06/07/2005US6903988 Semiconductor memory device
06/07/2005US6903987 Single data line sensing scheme for TCCT-based memory cells
06/07/2005US6903984 Floating-body DRAM using write word line for increased retention time
06/07/2005US6903982 Bit line segmenting in random access memories
06/07/2005US6903976 Semiconductor memory device reduced in power consumption during burn-in test
06/07/2005US6903975 Nonvolatile semiconductor memory device
06/07/2005US6903973 Semiconductor memory device
06/07/2005US6903972 Different methods applied for archiving data according to their desired lifetime
06/07/2005US6903969 One-device non-volatile random access memory cell
06/07/2005US6903967 Memory with charge storage locations and adjacent gate structures
06/07/2005US6903966 Semiconductor device
06/07/2005US6903965 Thin film magnetic memory device permitting high precision data read
06/07/2005US6903964 MRAM architecture with electrically isolated read and write circuitry
06/07/2005US6903963 Thin-film magnetic memory device executing data writing with data write magnetic fields in two directions
06/07/2005US6903962 Semiconductor memory device capable of controlling potential level of power supply line and/or ground line
06/07/2005US6903961 Semiconductor memory device having twin-cell units
06/07/2005US6903960 Junction-isolated depletion mode ferroelectric memory devices
06/07/2005US6903959 Sensing of memory integrated circuits
06/07/2005US6903957 Half density ROM embedded DRAM
06/07/2005US6903955 Semiconductor memory device having consistent skew over entire memory core
06/07/2005US6903954 High speed data bus
06/07/2005US6903909 Magnetoresistive element including ferromagnetic sublayer having smoothed surface
06/07/2005US6903572 Switch matrix circuit, logical operation circuit, and switch circuit
06/07/2005US6903437 Semiconductor devices, capacitor antifuses, dynamic random access memories, and cell plate bias connection methods
06/07/2005US6903430 Digital magnetic memory cell device
06/07/2005US6903423 Integrated semiconductor memory and method for reducing leakage currents in an integrated semiconductor
06/07/2005US6903399 Antiferromagnetically stabilized pseudo spin valve for memory applications
06/07/2005US6903396 Control of MTJ tunnel area
06/07/2005US6902963 SRAM cell and method of manufacturing the same
06/02/2005WO2005050845A1 Input/output device for a clock signal, in particular for the correction of clock signals
06/02/2005WO2005050676A2 Improved bit end design for pseudo spin valve (psv) devices
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