Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
06/2005
06/23/2005US20050135178 Memory array with staged output
06/23/2005US20050135177 Memory control device and memory control method
06/23/2005US20050135175 SRAM with temperature-dependent voltage control in sleep mode
06/23/2005US20050135174 Power-up signal generator for semiconductor memory devices
06/23/2005US20050135172 Semiconductor memory device for reducing write recovery time
06/23/2005US20050135171 Method and apparatus for controlling refresh cycles of a plural cycle refresh scheme in a dynamic memory
06/23/2005US20050135169 Method and apparatus to generate a reference value in a memory array
06/23/2005US20050135168 Apparatus for adjusting slew rate in semiconductor memory device and method therefor
06/23/2005US20050135166 Memory device capable of stable data writing
06/23/2005US20050135165 MRAM with controller
06/23/2005US20050135164 Semiconductor memory device which compensates for delay time variations of multi-bit data
06/23/2005US20050135163 Integrated circuit for storing operating parameters
06/23/2005US20050135162 Method and apparatus to clamp SRAM supply voltage
06/23/2005US20050135161 Semiconductor readout circuit
06/23/2005US20050135160 Semiconductor memory device with late write function and data input/output method therefor
06/23/2005US20050135158 Semiconductor memory device
06/23/2005US20050135156 Method for reducing the processing time of a data processing device
06/23/2005US20050135155 Nonvolatile semiconductor memory device
06/23/2005US20050135154 Nonvolatile semiconductor memory adapted to store a multi-valued data in a single memory cell
06/23/2005US20050135153 Memory unit having programmable device id
06/23/2005US20050135152 Novel monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout
06/23/2005US20050135151 Electron spin mechanisms for inducing magnetic-polarization reversal
06/23/2005US20050135150 Magnetic memory storage device
06/23/2005US20050135149 High write selectivity and low power magnetic random access memory and method for fabricating the same
06/23/2005US20050135148 Conductive memory array having page mode and burst mode read capability
06/23/2005US20050135147 Conductive memory array having page mode and burst mode write capability
06/23/2005US20050135146 Addressing circuit for a cross-point memory array including cross-point resistive elements
06/23/2005US20050135145 Synchronous flash memory device and method of operating the same
06/23/2005US20050135144 Molecular switching device
06/23/2005US20050135143 Ferroelectric RAM device and driving method
06/23/2005US20050135142 Storage circuit, semiconductor device, electronic apparatus, and driving method
06/23/2005US20050135141 FeRAM having sensing voltage control function
06/23/2005US20050135140 Serial diode cell and nonvolatile memory device using the same
06/23/2005US20050135139 Memory apparatus having a short word line cycle time and method for operating a memory apparatus
06/23/2005US20050135137 Semiconductor memory devices having conductive line in twisted areas of twisted bit line pairs
06/23/2005US20050134351 Delay adjustment circuit, integrated circuit device, and delay adjustment method
06/23/2005US20050134340 Data strobe circuit using clock signal
06/23/2005US20050134250 Power detector for use in a nonvolatile memory device and method thereof
06/23/2005US20050133853 Flash memory cell and method of erasing the same
06/23/2005US20050133852 High performance embedded semiconductor memory devices with multiple dimension first-level bit-lines
06/23/2005US20050133841 Charge-dipole coupled information storage medium
06/23/2005US20050133840 Synthetic antiferromagnet structures for use in mtjs in mram technology
06/23/2005DE10226485A1 Halbleiterspeicher mit Adressdecodiereinheit Semiconductor memory address decoding unit
06/23/2005DE102004056088A1 Speichersystem mit Flashspeicher Storage system with flash memory
06/23/2005DE102004054789A1 Informationsspeichermedium mit Ladungsträger-Dipol-Kopplung Information storage medium having carrier-dipole coupling
06/23/2005DE102004053497A1 Semiconductor memory device e.g. dynamic RAM, has bank selector to select bank, which performs refresh operation according to refresh information, where operation is performed with respect to all banks in refresh mode
06/23/2005DE102004052227A1 Speichersystem und Speichermodul Storage system, and storage modulus
06/23/2005DE102004039978A1 Magnetic tunnel junction device for magnetic RAM cell, has free magnetic layer with lamination of ferromagnetic layers, where magnetic spins of layer are rotated by magnetic flux Heasy in minimal overlap regions
06/23/2005DE102004031451A1 Halbleiterspeichervorrichtung zur Lieferung einer stabilen Hochspannung während eines Auto-Refresh-Vorgangs und Verfahren dazu A semiconductor memory device to provide a stable high voltage during an auto-refresh operation and method thereof
06/23/2005DE10117614B4 Verfahren zum Betreiben eines Halbleiterspeichers mit doppelter Datenübertragungsrate und Halbleiterspeicher A method of operating a semiconductor memory device with double data transfer rate and semiconductor memory
06/23/2005CA2552958A1 A memory device, an information storage process, a process, and a structured material
06/22/2005EP1544991A2 Voltage detector circuit, high-voltage generator circuit, and semiconductor memory device
06/22/2005EP1544863A1 Semiconductor readout circuit with equalisation circuit
06/22/2005EP1544742A1 Method for reducing the processing time of a data processing device
06/22/2005EP1544724A1 New FIFO memory structure and operting procedure of such a memory
06/22/2005EP1543566A2 Thermally stable magnetic element utilizing spin transfer and an mram device using the magnetic element
06/22/2005EP1543529A2 Non-volatile memory and its sensing method
06/22/2005EP1543527A2 Non-volatile memory and method of programming with reduced neighbouring field errors
06/22/2005EP1543525A2 Multi-port memory cells
06/22/2005EP1543524A2 Refresh control circuit for ics with a memory array
06/22/2005EP1543521A1 Non-volatile memory and method with reduced bit line crosstalk errors
06/22/2005CN1630921A Method for homogeneously magnetizing an exchange-coupled layer system of a digital magnetic memory location device
06/22/2005CN1630911A Partial page programming of multi level flash
06/22/2005CN1630858A Method and apparatus for supplementary command bus in a computer system
06/22/2005CN1630856A A memory and an adaptive timing system for controlling access to the memory
06/22/2005CN1630190A Delay adjustment circuit, integrated circuit device, and delay adjustment method
06/22/2005CN1630086A 半导体集成电路器件 The semiconductor integrated circuit device
06/22/2005CN1629983A Nonvolatile semiconductor memory device
06/22/2005CN1629982A Apparatus for adjusting slew rate in semiconductor memory device and method therefor
06/22/2005CN1629981A 半导体集成电路 The semiconductor integrated circuit
06/22/2005CN1629980A Semiconductor memory device for reducing address access time
06/22/2005CN1629979A Refresh controller with low peak current
06/22/2005CN1629978A Storage circuit, semiconductor device, electronic apparatus, and driving method
06/22/2005CN1629976A Random access memory initialization
06/22/2005CN1629975A Method for improving the read signal in a memory having passive memory elements
06/22/2005CN1629974A Memory circuit and method of generating the same
06/22/2005CN1629825A Method for reducing the processing time of a data processing device
06/22/2005CN1207721C Clock synchronous circuit and semiconductor memory
06/22/2005CN1207720C Semiconductor memory device
06/22/2005CN1207719C MRAM memory unit
06/22/2005CN1207718C Thin film magnet storage device capable of easily controlling data writing current
06/22/2005CN1207717C Magnetic resistance memory module device
06/22/2005CN1207716C Arbitrary selective access semiconductor memory having reduced signal overcoupling
06/22/2005CN1207715C 半导体存储器件及其控制方法 The semiconductor memory device and control method
06/21/2005US6909665 Semiconductor memory device having high-speed input/output architecture
06/21/2005US6909664 Semiconductor memory device with simplified control of column switches
06/21/2005US6909662 Data read circuit in a semiconductor device featuring reduced chip area and increased data transfer rate
06/21/2005US6909661 Semiconductor memory device with data input/output organization in multiples of nine bits
06/21/2005US6909658 Semiconductor memory device with row selection control circuit
06/21/2005US6909657 Pseudostatic memory circuit
06/21/2005US6909656 PCRAM rewrite prevention
06/21/2005US6909654 Bit line pre-charge circuit of semiconductor memory device
06/21/2005US6909653 Memory integrated circuit device having self reset circuit for precharging data buses based on the detection of their discharge levels
06/21/2005US6909652 SRAM bit-line reduction
06/21/2005US6909646 Semiconductor memory device having improved arrangement for replacing failed bit lines
06/21/2005US6909644 Semiconductor memory device
06/21/2005US6909643 Semiconductor memory device having advanced data strobe circuit
06/21/2005US6909642 Self trimming voltage generator
06/21/2005US6909640 Block select circuit in a flash memory device
06/21/2005US6909639 Nonvolatile memory having bit line discharge, and method of operation thereof