Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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03/05/2015 | WO2015030991A1 Apparatuses and methods for selective row refreshes |
03/05/2015 | WO2015030937A1 Offset canceling dual stage sensing circuit |
03/05/2015 | WO2015030834A1 Increased refresh interval and energy efficiency in a dram |
03/05/2015 | WO2015030751A1 Refresh rate adjust |
03/05/2015 | WO2015029700A1 Semiconductor memory device |
03/05/2015 | WO2015029699A1 Semiconductor memory device |
03/05/2015 | US20150067254 Multi-Interface Memory With Access Control |
03/05/2015 | US20150067249 Memory Scheduling Method and Memory Controller |
03/05/2015 | US20150067246 Coherence processing employing black box duplicate tags |
03/05/2015 | US20150063051 Low power protection circuit |
03/05/2015 | US20150063050 Semiconductor device performing refresh operation |
03/05/2015 | US20150063049 Semiconductor device |
03/05/2015 | US20150063041 Semiconductor device |
03/05/2015 | US20150063040 Three dimensional cross-access dual-port bit cell design |
03/05/2015 | US20150063022 Apparatuses and methods involving accessing distributed sub-blocks of memory cells |
03/05/2015 | US20150063020 Semiconductor device |
03/05/2015 | US20150063019 Thermally-assisted magnetic writing device |
03/05/2015 | US20150063018 Methods of operating a magnetic memory device |
03/05/2015 | US20150063017 Semiconductor memory device |
03/05/2015 | US20150063016 Semiconductor memory device |
03/05/2015 | US20150063015 Semiconductor memory device |
03/05/2015 | US20150063014 Magnetic memory and controlling method thereof |
03/05/2015 | US20150063013 Semiconductor memory device |
03/05/2015 | US20150063012 Offset canceling dual stage sensing circuit |
03/05/2015 | US20150063011 Method for improving the stabillity, write-ability and manufacturability of magneto-resistive random access memory |
03/05/2015 | US20150063010 Negative bias thermal instability stress testing for static random access memory (sram) |
03/05/2015 | US20150063009 Dynamic static random access memory (sram) array characterization |
03/05/2015 | US20150063008 Input data alignment circuit and semiconductor device including the same |
03/05/2015 | US20150063007 Static random access memory device including dual power line and bit line precharge method thereof |
03/05/2015 | US20150063006 Semiconductor device |
03/05/2015 | US20150063005 Semiconductor memory device |
03/05/2015 | US20150063001 Semiconductor device |
03/05/2015 | US20150062999 Memory device, memory module including the memory device, method of fabricating the memory module, and method of repairing the memory module |
03/05/2015 | US20150060969 Semiconductor device and method for manufacturing semiconductor device |
03/05/2015 | DE10305823B4 Magnetowiderstandseffekt-Element und Magnetspeicher mit einem solchen A magnetoresistance effect element and the magnetic memory with such a |
03/04/2015 | EP2843664A1 Mask red-only memory |
03/03/2015 | US8972822 Memory module and semiconductor storage device |
03/03/2015 | US8972790 Memory controller and memory access system with error detection using data comparison of loop-backed signals |
03/03/2015 | US8972775 Memory device and method of managing memory data error including determining verification voltages and changing threshold voltages based on a corrected error bit |
03/03/2015 | US8972685 Method, apparatus and system for exchanging communications via a command/address bus |
03/03/2015 | US8972674 Compensation for solid state storage |
03/03/2015 | US8972673 Power management of memory circuits by virtual memory simulation |
03/03/2015 | US8971977 Superconducting devices with ferromagnetic barrier junctions |
03/03/2015 | US8971146 Dual-port SRAM with bit line clamping |
03/03/2015 | US8971143 Semiconductor device periodically updating delay locked loop circuit |
03/03/2015 | US8971142 Semiconductor memory device and method of operating the same |
03/03/2015 | US8971141 Compact high speed sense amplifier for non-volatile memory and hybrid lockout |
03/03/2015 | US8971140 Semiconductor device and data processing system comprising semiconductor device |
03/03/2015 | US8971139 Semiconductor device and data processing system |
03/03/2015 | US8971138 Method of screening static random access memory cells for positive bias temperature instability |
03/03/2015 | US8971137 Bit based fuse repair |
03/03/2015 | US8971136 Memory device correcting the effect of collision of high-energy particles |
03/03/2015 | US8971132 Semiconductor device, method for controlling the same, and semiconductor system |
03/03/2015 | US8971130 Semiconductor memory device capable of shortening erase time |
03/03/2015 | US8971129 NROM device with reduced power unit |
03/03/2015 | US8971128 Adaptive initial program voltage for non-volatile memory |
03/03/2015 | US8971127 NAND flash memory programming |
03/03/2015 | US8971126 Charge loss compensation methods and apparatus |
03/03/2015 | US8971125 Erase operations with erase-verify voltages based on where in the erase operations an erase cycle occurs |
03/03/2015 | US8971123 Memory system temperature calibration |
03/03/2015 | US8971121 Method and devices for memory cell erasure with a programming monitor of reference cells |
03/03/2015 | US8971120 Semiconductor memory device |
03/03/2015 | US8971119 Select transistor tuning |
03/03/2015 | US8971115 Semiconductor memory device |
03/03/2015 | US8971113 Pseudo-8T NVSRAM cell with a charge-follower |
03/03/2015 | US8971112 Method of programming a multi-level memory device |
03/03/2015 | US8971111 Threshold voltage calibration using reference pattern detection |
03/03/2015 | US8971110 Nonvolatile memory device and programming method of the same |
03/03/2015 | US8971108 Semiconductor memory device and method for driving the same |
03/03/2015 | US8971107 Emulation of static random access memory (SRAM) by magnetic random access memory (MRAM) |
03/03/2015 | US8971105 Methods and apparatuses for controlling memory write sequences |
03/03/2015 | US8971103 Thermally-assisted MRAM with ferromagnetic layers with temperature dependent magnetization |
03/03/2015 | US8971102 MRAM cell and method for writing to the MRAM cell using a thermally assisted write operation with a reduced field current |
03/03/2015 | US8971101 Magnetic memory cell structure with improved read margin |
03/03/2015 | US8971100 Initialization method of a perpendicular magnetic random access memory (MRAM) device |
03/03/2015 | US8971099 Method of measuring threshold voltage of MOS transistor in SRAM array |
03/03/2015 | US8971098 Latch-based array with enhanced read enable fault testing |
03/03/2015 | US8971097 SRAM bit-line and write assist apparatus and method for lowering dynamic power and peak current, and a dual input level-shifter |
03/03/2015 | US8971096 Wide range multiport bitcell |
03/03/2015 | US8971095 Memory architecture |
03/03/2015 | US8971094 Replacement of a faulty memory cell with a spare cell for a memory circuit |
03/03/2015 | US8971093 Memory device and method of controlling memory device |
03/03/2015 | US8971092 Semiconductor memory device |
03/03/2015 | US8971091 Method and circuit for switching a memristive device in an array |
03/03/2015 | US8971089 Low power phase change memory cell |
03/03/2015 | US8971088 Multi-level cell operation using zinc oxide switching material in non-volatile memory device |
03/03/2015 | US8971085 Self-refresh adjustment in memory devices configured for stacked arrangements |
03/03/2015 | US8970003 Embedded passive integration |
03/03/2015 | US8969983 Semiconductor storage device and manufacturing method thereof |
03/03/2015 | US8969972 Modifying work function in PMOS devices by counter-doping |
02/26/2015 | WO2015027028A1 Memory with multiple word line design |
02/26/2015 | WO2015026572A1 Data recovery from blocks with gate shorts |
02/26/2015 | WO2015026489A1 Memory system with application of delays in programming cycles to comply with target programming time |
02/26/2015 | WO2015025732A1 Information processing apparatus, method of controlling the same, program, and storage medium |
02/26/2015 | US20150058549 Detection of multiple accesses to a row address of a dynamic memory within a refresh period |
02/26/2015 | US20150055431 Methods and apparatuses including transmitter circuits |
02/26/2015 | US20150055426 Novel sense amplifier scheme |
02/26/2015 | US20150055420 Apparatuses and methods for selective row refreshes |
02/26/2015 | US20150055410 Memory circuit and method for dissipating external magnetic field |
02/26/2015 | US20150055406 Non-destructive write/read leveling |