Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 5 - Methods or arrangements for data conversion without changing the order or content of the data handled
Patents for G06F 5 - Methods or arrangements for data conversion without changing the order or content of the data handled (8,116)
01/2001
01/09/2001US6172927 First-in, first-out integrated circuit memory device incorporating a retransmit function
01/09/2001US6172540 Apparatus for fast logic transfer of data across asynchronous clock domains
01/03/2001EP1064781A1 Memory management in a receiver/decoder
01/02/2001US6169842 Recording and reproducing system for simultaneous recording and reproduction via an information carrier
12/2000
12/28/2000WO2000079378A1 First-in first-out storage device
12/27/2000EP1063842A1 Broadcast receiver
12/26/2000US6167473 System for detecting peripheral input activity and dynamically adjusting flushing rate of corresponding output device in response to detected activity level of the input device
12/26/2000US6167420 Multiplication method and multiplication circuit
12/26/2000US6167419 Multiplication method and multiplication circuit
12/26/2000US6167418 Byte-switching arithmetic unit
12/26/2000US6167109 Compact buffer design for serial I/O
12/26/2000US6166963 Dual port memory with synchronized read and write pointers
12/21/2000WO2000077786A1 Data transfer apparatus, data transfer system, and data transfer method with double buffering
12/21/2000CA2374984A1 Data transfer apparatus, data transfer system, and data transfer method with double buffering
12/20/2000EP1061435A2 Method and system for filter-processing by ensuring a memory space for a ring-buffer in digital signal processor
12/19/2000US6163820 Efficient data transfer mechanism for input/output devices
12/19/2000US6163819 Sequential data transfer circuit
12/12/2000US6161120 Apparatus for performing a division operation, especially for three-dimensional graphics
12/12/2000US6161119 Hardware multiplication of scaled integers
12/12/2000US6160426 Semiconductor memory device having clock frequency multiplying apparatus
12/12/2000CA2230108C An apparatus for performing multiply-add operations on packed data
12/12/2000CA2079623C Method and apparatus for providing two parties transparent access to a single-port memory storage device
12/07/2000WO2000073872A2 Fft processor with overflow prevention
12/05/2000US6158014 Automatic detection of 8B/10B data rates
11/2000
11/29/2000EP1055196A2 Code compaction by evolutionary algorithm
11/29/2000EP1055169A1 Fifo unit with single pointer
11/28/2000US6154760 Instruction to normalize redundantly encoded floating point numbers
11/28/2000US6154758 Text conversion method for computer systems
11/28/2000US6154407 First in first out memory circuit
11/28/2000US6154153 Method for compressing and decompressing integer-vector data
11/22/2000EP0672274A4 Computer network extender
11/21/2000US6151682 Digital signal processing circuitry having integrated timing information
11/21/2000US6151658 Write-buffer FIFO architecture with random access snooping capability
11/21/2000US6151636 Data and media communication through a lossy channel using signal conversion
11/21/2000US6151615 Method and apparatus for formatting an intermediate result for parallel normalization and rounding technique for floating point arithmetic operations
11/21/2000US6151316 Apparatus and method for synthesizing management packets for transmission between a network switch and a host controller
11/16/2000WO2000068794A1 Process for the secure writing of a pointer for a circular memory
11/16/2000WO2000068774A1 Fifo system with variable-width interface to host processor
11/16/2000DE19921232A1 Verfahren zum gesicherten Schreiben eines Zeigers für einen Ringspeicher Method for the secure writing a pointer to a ring buffer
11/14/2000US6148386 Address generator circuity for a circular buffer
11/14/2000US6148365 Dual pointer circular queue
11/14/2000US6148315 Floating point unit having a unified adder-shifter design
11/08/2000CN1272673A Production of improved oblique pointer
11/07/2000US6145061 Method of management of a circular queue for asynchronous access
11/07/2000US6145033 Management of display FIFO requests for DRAM access wherein low priority requests are initiated when FIFO level is below/equal to high threshold value
11/07/2000US6145026 Parameterizing an I/O interface for substantially writing unlimited data into a buffer and directly writing a determined amount of said data into a computer main memory
11/07/2000US6144995 Data transfer method for logical computers
11/07/2000US6144322 Variable length code processor with encoding and/or decoding
11/07/2000CA2177307C High-speed data register for laser range finders
11/02/2000EP1049024A1 Signal processing system and method
10/2000
10/31/2000US6140843 Conditional invert functions in precharged circuits
10/31/2000CA2088156C Method and means for transferring a data payload from a first sonet signal to a sonet signal of different frequency
10/26/2000WO2000022890A3 Intelligent flashing
10/24/2000US6138188 Buffer management device and method for improving buffer usage and access performance in data processing system
10/24/2000US6138164 System for minimizing screen refresh time using selectable compression speeds
10/19/2000WO2000062154A1 Apparatus and method for providing a cyclic buffer
10/19/2000WO2000062153A1 Divided buffer
10/18/2000EP1045520A1 Arithmetic coding with prevention of carry over propagation
10/17/2000US6134629 Determining thresholds and wrap-around conditions in a first-in-first-out memory supporting a variety of read and write transaction sizes
10/17/2000US6134166 Programmable logic array integrated circuit incorporating a first-in first-out memory
10/17/2000US6134155 Synchronized circuit for coordinating address pointers across clock domains
10/12/2000WO2000060749A1 Processor and processing method
10/10/2000US6130891 Integrated multiport switch having management information base (MIB) interface temporary storage
10/10/2000US6130854 Programmable address decoder for field programmable memory array
10/04/2000CN1269028A Interface circuit for full-custom and semi-custom timing domains
10/03/2000US6128715 Asynchronous transmit packet buffer
10/03/2000US6128688 Bus control system
10/03/2000US6128678 FIFO using asynchronous logic to interface between clocked logic circuits
10/03/2000US6128654 Method and apparatus for transmitting multiple copies by replicating data identifiers
09/2000
09/28/2000WO2000057268A1 Generating optimized computer data field conversion routines
09/28/2000CA2367061A1 Generating optimized computer data field conversion routines
09/27/2000EP1039743A1 Data converter, computer, and printer
09/27/2000EP1039371A1 An apparatus and a method for handling data between two asynchronous units
09/27/2000EP1039370A1 Modulo address generator and a method for implementing modulo addressing
09/27/2000EP1039369A1 Improved skew pointer generation
09/26/2000US6125406 Bi-directional packing data device enabling forward/reverse bit sequences with two output latches
09/26/2000US6124735 Method and apparatus for a N-nary logic circuit using capacitance isolation
09/20/2000EP1036360A1 Shared memory control using multiple linked lists with pointers, status flags, memory block counters and parity
09/19/2000US6122717 Methods and apparatus for a memory that supports a variable number of bytes per logical cell and a variable number of cells
09/19/2000US6122651 Method and apparatus for performing overshifted rotate through carry instructions by shifting in opposite directions
09/19/2000US6121815 Semiconductor integrated circuit, system, and method for reducing a skew between a clock signal and a data signal
09/14/2000WO2000054163A1 Elastic interface apparatus and method therefor
09/14/2000WO2000054141A1 System and method for transmitting data telegrams with alternating occupation of at least three data buffers
09/13/2000EP1035470A2 Command transfer control method, apparatus, and system
09/13/2000EP1034538A2 Transferring compressed audio via a playback buffer
09/12/2000US6119207 Low priority FIFO request assignment for DRAM access
09/12/2000US6118707 Method of operating a field programmable memory array with a field programmable gate array
09/12/2000US6118690 Dual storage cell memory
09/12/2000US6118444 Media composition system with enhanced user interface features
09/12/2000US6118304 Method and apparatus for logic synchronization
09/12/2000US6116768 Three input arithmetic logic unit with barrel rotator
09/08/2000WO2000052567A1 System for transmitting data records that are divided into a plurality of words
09/07/2000DE19909081A1 Anordnung zur Übertragung von in mehrere Wörter unterteilten Datensätzen Arrangement for transmitting divided into several words records
09/06/2000EP1033654A1 Buffered communication between entities operating at different data rates
09/06/2000EP1032882A1 Buffering data that flows between buses operating at different frequencies
09/05/2000US6115760 Intelligent scaleable FIFO buffer circuit for interfacing between digital domains
09/05/2000US6115548 Method and apparatus for interfacing data signal and associated clock signal to circuit controlled by local clock signal
09/05/2000US6115387 Method and apparatus for controlling initiation of transmission of data as a function of received data
09/05/2000US6115294 Method and apparatus for multi-bit register cell
08/2000
08/29/2000US6112295 High frequency pipeline decoupling queue with non-overlapping read and write signals within a single clock cycle
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