| Patents for G06F 5 - Methods or arrangements for data conversion without changing the order or content of the data handled (8,116) |
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| 07/07/1998 | US5777906 Left shift overflow detection |
| 06/30/1998 | US5774715 File system level compression using holes |
| 06/30/1998 | CA2062441C A data shifting circuit capable of an original data width rotation and a double data width rotation. |
| 06/23/1998 | US5771368 Memory addressing scheme for increasing the number of memory locations available in a computer for storing higher precision numbers |
| 06/23/1998 | US5771183 Apparatus and method for computation of sticky bit in a multi-stage shifter used for floating point arithmetic |
| 06/23/1998 | CA2065894C Data transfer system |
| 06/18/1998 | WO1998026348A1 Multiple parallel identical finite state machines which share combinatorial logic |
| 06/17/1998 | EP0847552A1 An apparatus for performing multiply-add operations on packed data |
| 06/17/1998 | EP0847551A1 A set of instructions for operating on packed data |
| 06/16/1998 | US5768626 Method and apparatus for servicing a plurality of FIFO's in a capture gate array |
| 06/16/1998 | US5768416 Information processing methodology |
| 06/16/1998 | US5768325 Time-adjustable delay circuit |
| 06/10/1998 | CN1184536A Arrangement and method relating to handling of digital signals and a processing arrangment comprising such |
| 06/09/1998 | US5765218 Address generating circuit for generating addresses separated by a prescribed step value in circular addressing |
| 06/09/1998 | US5765187 Control system for a ring buffer which prevents overrunning and underrunning |
| 06/09/1998 | US5765041 In an information handling system |
| 06/09/1998 | US5764967 Multiple frequency memory array clocking scheme for reading and writing multiple width digital words |
| 06/09/1998 | US5764549 Fast floating point result alignment apparatus |
| 06/03/1998 | EP0845739A1 A method to transfer data, a transfer device realising the method, a comparator using such a transfer device and a use of such a comparator as a filling level controller of a memory means |
| 06/03/1998 | CN1183842A Interface circuit and data processing apparatus and method |
| 06/02/1998 | US5761735 Circuit for synchronizing data transfers between two devices operating at different speeds |
| 06/02/1998 | US5761726 Base address generation in a multi-processing system having plural memories with a unified address space corresponding to each processor |
| 06/02/1998 | US5761348 Data processing apparatus with data bit width conversion |
| 05/28/1998 | DE19650993A1 Anordnung und Verfahren zur Verbesserung der Datensicherheit mittels Ringpuffer Apparatus and method for improving data security by means of ring buffer |
| 05/26/1998 | US5758192 FIFO memory system determining full empty using predetermined address segments and method for controlling same |
| 05/26/1998 | US5758139 Control chains for controlling data flow in interlocked data path circuits |
| 05/26/1998 | US5757687 Method and apparatus for bounding alignment shifts to enable at-speed denormalized result generation in an FMAC |
| 05/26/1998 | US5757682 Parallel calculation of exponent and sticky bit during normalization |
| 05/26/1998 | US5757207 Programmable logic array integrated circuit incorporating a first-in first-out memory |
| 05/22/1998 | WO1998021647A1 A method and arrangement to effectively retrieve data from a buffer |
| 05/20/1998 | DE19724658A1 Data transfer rate matching method |
| 05/19/1998 | US5754811 Instruction dispatch queue for improved instruction cache to queue timing |
| 05/19/1998 | US5754810 Specialized millicode instruction for certain decimal operations |
| 05/19/1998 | US5754128 Variable-length code encoding and segmenting apparatus having a byte alignment unit |
| 05/13/1998 | CN1181595A Semiconductor memory |
| 05/12/1998 | US5751771 Waveform data compression apparatus and waveform data expansion apparatus |
| 05/12/1998 | US5751638 Mail-box design for non-blocking communication across ports of a multi-port device |
| 05/06/1998 | EP0840203A2 Semiconductor FIFO memory |
| 05/06/1998 | EP0840202A1 Dynamic peripheral control of I/O buffers in peripherals with modular I/O |
| 05/05/1998 | US5748539 Recursive multi-channel interface |
| 04/28/1998 | US5745793 Apparatus having a circular buffer that maintains a one entry gap between elements written to the microprocessor and elements operated on by the clock |
| 04/28/1998 | US5745790 Method and apparatus for reporting the status of asynchronous data transfer |
| 04/28/1998 | US5745785 System for alternatively transferring data from external memory to memory device and from memory device to internal memory depending upon processing unit's operational |
| 04/28/1998 | US5745731 Dual channel FIFO circuit with a single ported SRAM |
| 04/28/1998 | US5745608 Storing data compressed with arithmetic coding in non-contiguous memory |
| 04/28/1998 | US5745393 Left-shifting an integer operand and providing a clamped integer result |
| 04/28/1998 | CA2054459C Apparatus for increasing the number of registers available in a computer processor |
| 04/21/1998 | US5742536 Parallel calculation of exponent and sticky bit during normalization |
| 04/21/1998 | US5742535 Parallel calculation of exponent and sticky bit during normalization |
| 04/16/1998 | WO1998015891A1 Apparatus and method for converting digital words or bytes of a given number of bits to bytes of a different number of bits |
| 04/14/1998 | US5740467 Apparatus and method for controlling interrupts to a host during data transfer between the host and an adapter |
| 04/14/1998 | US5740448 Method and apparatus for exclusive access to shared data structures through index referenced buffers |
| 04/14/1998 | US5739779 Encoding circuit and decoding circuit |
| 04/14/1998 | US5739778 Digital data formatting/deformatting circuits |
| 04/08/1998 | EP0834834A2 Image coding method |
| 04/08/1998 | EP0834802A2 Control structure for a high-speed asynchronous pipeline |
| 04/08/1998 | EP0834113A1 Display fifo module including a mechanism for issuing and removing requests for dram access |
| 04/07/1998 | US5737621 Finite-state encoding system for hyphenation rules |
| 04/07/1998 | US5737587 Resynchronization circuit for circuit module architecture |
| 04/01/1998 | EP0832457A1 Split buffer architecture |
| 03/31/1998 | US5734880 Hardware branching employing loop control registers loaded according to status of sections of an arithmetic logic unit divided into a plurality of sections |
| 03/31/1998 | US5734584 Integrated structure layout and layout of interconnections for an integrated circuit chip |
| 03/31/1998 | CA2025711C Apparatus and method for asynchronously delivering control elements with a pipe interface |
| 03/26/1998 | WO1998012623A1 Single port first-in-first-out (fifo) storage device having over-write protection and diagnostic capabilities |
| 03/25/1998 | EP0831393A2 Data buffering apparatus equipped with small buffer memory shared between channel data groups |
| 03/24/1998 | US5732286 FIFO based receive packet throttle for receiving long strings of short data packets |
| 03/24/1998 | US5732223 SCSI host adapter with shared command and data buffer |
| 03/24/1998 | US5732011 Digital system having high speed buffering |
| 03/24/1998 | US5732007 Computer methods and apparatus for eliminating leading non-significant digits in floating point computations |
| 03/24/1998 | US5731770 Digital data buffering device |
| 03/19/1998 | WO1998011547A1 Recording and reproducing system for simultaneous recording and reproduction via an information carrier |
| 03/17/1998 | US5729724 Adaptive 128-bit floating point load and store operations for quadruple precision compatibility |
| 03/17/1998 | US5729550 Data transmitter-receiver |
| 03/17/1998 | US5729482 Microprocessor shifter using rotation and masking operations |
| 03/11/1998 | CN1175729A Code translation circuit |
| 03/10/1998 | US5727123 Block normalization processor |
| 03/10/1998 | US5726926 Shifter for shifting floating point number utilizing arithmetic operation of redundant binary number, and adder containing the same |
| 03/04/1998 | EP0826171A1 Interface circuit and data processing apparatus and method |
| 03/03/1998 | US5724562 Clock-synchronized C-element group for controlling data transfer |
| 02/24/1998 | US5721958 Apparatus and method for peripheral device control with integrated data compression |
| 02/24/1998 | US5721841 Adapter having data aligner including register being loaded to or from memory with an offset in accordance with predetermined network fragmentation parameters |
| 02/17/1998 | US5719644 Data collision avoidance circuit used in an image processing FIFO memory |
| 02/12/1998 | WO1998006028A1 A lempel-ziv data compression technique utilizing a dicionary pre-filled with fequent letter combinations, words and/or phrases |
| 02/10/1998 | US5717954 Locked exchange FIFO |
| 02/03/1998 | US5715477 Apparatus and method for peripheral device control with integrated data compression |
| 02/03/1998 | US5715007 Image decoder with block image shifting device |
| 01/28/1998 | EP0820612A1 Apparatus and method for peripheral device control with integrated data compression |
| 01/27/1998 | US5712992 State machine design for generating empty and full flags in an asynchronous FIFO |
| 01/27/1998 | US5712820 Multiple word width memory array clocking scheme |
| 01/22/1998 | WO1998002803A1 Unified load/store unit for a superscalar microprocessor and method of operating the same |
| 01/21/1998 | EP0820148A2 Code translation circuit |
| 01/13/1998 | US5708800 High speed microprocessor for processing and transferring N-bits of M-bit data |
| 01/07/1998 | EP0815505A1 Arrangement and method relating to handling of digital signals and a processing arrangement comprising such |
| 01/07/1998 | CN1169564A Tape printers |
| 01/06/1998 | US5706443 Method and apparatus for enabling pipelining of buffered data |
| 01/06/1998 | US5706299 Sonet tributary ambiguity resolution for elastic store control |
| 12/23/1997 | US5701517 Pipelined alignment shifter and method for universal bit field boundary alignment |
| 12/23/1997 | US5701468 System for performing data compression based on a Liu-Zempel algorithm |
| 12/17/1997 | CN1167951A Method of and apparatus for compressing and expanding data and data processing apparatus and network system using same |
| 12/16/1997 | US5699530 Circular RAM-based first-in/first-out buffer employing interleaved storage locations and cross pointers |