Patents
Patents for G06F 5 - Methods or arrangements for data conversion without changing the order or content of the data handled (8,116)
12/1997
12/16/1997US5699285 Normalization circuit device of floating point computation device
12/10/1997EP0811934A2 Management of overflowing data in a computer system
12/09/1997US5696991 Method and device for parallel accessing data with optimal reading start
12/09/1997US5696990 Method and apparatus for providing improved flow control for input/output operations in a computer system having a FIFO circuit and an overflow storage area
12/09/1997US5696954 Three input arithmetic logic unit with shifting means at one input forming a sum/difference of two inputs logically anded with a third input logically ored with the sum/difference logically anded with an inverse of the third input
12/09/1997US5696946 Computer storage medium
12/09/1997US5696768 Method and apparatus for data storage array tracking
12/09/1997US5696563 Apparatus and methods for performing huffman coding
12/03/1997EP0809826A1 Optimization of the transfer of data word sequences
12/02/1997US5694580 Method of converting data and device for performing the method
12/02/1997US5694404 Error-correcting virtual receiving buffer apparatus
12/02/1997US5694128 Tree structured binary arithmetic coder
11/1997
11/26/1997EP0809255A2 Shift register cell
11/26/1997EP0809179A2 Digital microprocessor device having variable-delay division hardware
11/25/1997US5692190 Data processing system
11/25/1997US5692159 Configurable digital signal interface using field programmable gate array to reformat data
11/20/1997WO1997043764A1 Memory device
11/19/1997EP0807886A2 Optical network device
11/19/1997CN1165342A Semiconductor integrated circuit and consumed power reducing method
11/18/1997US5689723 Method for allowing single-byte character set and double-byte character set fonts in a double-byte character set code page
11/12/1997EP0806004A1 Data transmission system
11/11/1997US5686913 Serial data interface apparatus and method for detecting an input word length and selecting an operating mode accordingly
11/11/1997US5686912 Method of compressing a stream of raw data
11/06/1997WO1997041514A1 Qualified burst buffer
11/05/1997EP0804762A1 Self-diagnostic asynchronous data buffers
10/1997
10/30/1997DE19716910A1 Data path control device for FIFO digital pipeline control circuit
10/29/1997EP0803982A1 Electronic system organized in a matrix array of functional cells
10/29/1997EP0803797A1 System for use in a computerized imaging system to efficiently transfer graphic information to a graphics subsystem employing masked span
10/29/1997EP0803104A1 Number formatting framework
10/29/1997EP0803089A1 A data transmission system
10/28/1997US5682340 Low power consumption circuit and method of operation for implementing shifts and bit reversals
10/28/1997US5682339 Method for performing rotate through carry using a 32 bit barrel shifter and counter
10/22/1997CN1162819A Buffer memory controller
10/21/1997US5680133 Analog-to-digital converter
10/16/1997WO1997038434A1 Recompression server
10/16/1997CA2731259A1 Recompression server
10/14/1997US5677862 Method for multiplying packed data
10/09/1997WO1997037298A1 Fifo memory system
10/08/1997EP0800133A1 Databus parity and high speed normalization circuit for a massively parallel processing system
10/07/1997US5675826 Image data storage
10/07/1997US5675526 Processor performing packed data multiplication
10/01/1997EP0798863A1 Analogue/digital converter having a high sampling rate
10/01/1997EP0798656A2 File system level compression using holes
10/01/1997EP0798630A1 A synchronizer, method and system for transferring data
09/1997
09/30/1997US5673416 Memory request and control unit including a mechanism for issuing and removing requests for memory access
09/30/1997US5673407 Data processor having capability to perform both floating point operations and memory access in response to a single instruction
09/30/1997US5673397 FIFO queue having replaceable entries
09/30/1997US5673396 Adjustable depth/width FIFO buffer for variable width data transfers
09/30/1997US5673321 Efficient selection and mixing of multiple sub-word items packed into two or more computer words
09/30/1997US5673234 Read bitline writer for fallthru in FIFO's
09/30/1997US5673209 Apparatus and associated method for compressing and decompressing digital data
09/30/1997US5673206 Real-time digital audio compression/decompression system
09/30/1997US5673042 Method of and an apparatus for compressing/decompressing data
09/24/1997EP0797325A2 Receiver with data frame buffering
09/23/1997US5671371 For use in a data processing system
09/23/1997US5671166 Barrel shifter for combining pieces of data into a piece of combined data and shifting the combined data
09/17/1997EP0795831A1 Peripheral interface with delayed flow control for run length encoded data transfers
09/17/1997EP0795155A1 A microprocessor having a multiply operation
09/17/1997CN1159629A Adjustable depth/width FIFO buffer for width changeable data transfer
09/16/1997US5668984 Digital number processing system
09/16/1997US5668767 Polled FIFO flags
09/15/1997CA2200028A1 Peripheral interface with delayed flow control for run length encoded data transfers
09/12/1997WO1997033222A1 Apparatus for performing packed shift operations
09/10/1997CN1159060A Field programmable memory array
09/09/1997US5666298 Method for performing shift operations on packed data
09/02/1997US5664117 Apparatus and method for prefetching data to load buffers in a bridge between two buses in a computer
09/02/1997US5664114 Asynchronous FIFO queuing system operating with minimal queue status
09/02/1997US5663994 Two cycle asynchronous FIFO queue
09/02/1997US5663910 Interleaving architecture and method for a high density FIFO
08/1997
08/26/1997US5661418 Signal generation decoder circuit and method
08/19/1997US5659700 Apparatus and method for generating a modulo address
08/19/1997US5659698 Method and apparatus for generating a circular buffer address in integrated circuit that performs multiple communications tasks
08/13/1997EP0789460A1 Data compression/decompression apparatus and method
08/13/1997EP0789326A2 Data compression system and data restoration system
08/12/1997US5657466 Circuit for designating write and read address to provide a delay time in a sound system
08/12/1997US5657259 For use in a computer system
08/12/1997US5656948 Null convention threshold gate
08/06/1997EP0788239A2 Method of and apparatus for compressing and decompressing data and data processing apparatus and network system using the same
08/06/1997EP0787327A2 Data processing system comprising an asynchronously controlled pipeline
08/05/1997US5655153 Buffer system
08/05/1997US5655138 Apparatus and method for peripheral device control with integrated data compression
08/05/1997US5654990 Real-time digital audio compression/decompression system
07/1997
07/30/1997EP0786112A1 A circuit for coordinating the timing of operations of asynchronously operating sub-circuits
07/29/1997US5652912 Versatile memory controller chip for concurrent input/output operations
07/29/1997US5652902 Asynchronous register for null convention logic systems
07/29/1997US5652878 Method and apparatus for compressing data
07/29/1997US5652857 Disk control apparatus for recording and reproducing compression data to physical device of direct access type
07/29/1997US5652852 Processor for discriminating between compressed and non-compressed program code, with prefetching, decoding and execution of compressed code in parallel with the decoding, with modified target branch addresses accommodated at run time
07/29/1997US5652718 Barrel shifter
07/29/1997US5652583 Apparatus for encoding variable-length codes and segmenting variable-length codewords thereof
07/29/1997US5652581 Distributed coding and prediction by use of contexts
07/22/1997US5651034 Method and equipment for monitoring the fill rate of an elastic buffer memory in a synchronous digital telecommunication system
07/22/1997US5650783 Data coding/decoding device and method
07/16/1997EP0784287A2 Buffer memory managing method and printing apparatus adopting the method
07/16/1997CN1154511A First-in first-out memory device for enabling sizes of input/output data to be different from each other and method therefor
07/15/1997US5649232 Structure and method for multiple-level read buffer supporting optimal throttled read operations by regulating transfer rate
07/15/1997US5649230 System for transferring data using value in hardware FIFO'S unused data start pointer to update virtual FIFO'S start address pointer for fast context switching
07/15/1997US5649217 Switching system having control circuit and plural buffer memories for data exchange in asynchronous transfer mode
07/15/1997US5649150 Scannable last-in-first-out register stack
07/15/1997US5649146 Modulo addressing buffer
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