Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 5 - Methods or arrangements for data conversion without changing the order or content of the data handled
Patents for G06F 5 - Methods or arrangements for data conversion without changing the order or content of the data handled (8,116)
01/1997
01/07/1997US5592639 Device and method for writing in a storage device of the queue type
01/07/1997US5592629 Apparatus and method for matching data rates to transfer data between two asynchronous devices
01/02/1997EP0751460A2 System and method of controlling mapping of data buffers for heterogenous programs in digital computer system
01/02/1997EP0751456A1 Efficient selection and mixing of multiple sub-word items packed into two or more computer words
12/1996
12/31/1996US5590304 Circuits, systems and methods for preventing queue overflow in data processing systems
12/31/1996US5589787 Cell for shift register
12/24/1996US5588101 Bit data processor
12/24/1996US5587953 First-in-first-out buffer memory
12/24/1996US5587672 Dynamic logic having power-down mode with periodic clock refresh for a low-power graphics controller
12/19/1996WO1996041266A1 Split buffer architecture
12/19/1996WO1996041256A1 Display fifo module including a mechanism for issuing and removing requests for dram access
12/19/1996CA2223890A1 Split buffer architecture
12/11/1996EP0747904A1 High speed data register for laser range finders
12/10/1996US5584038 Entry allocation in a circular buffer using wrap bits indicating whether a queue of the circular buffer has been traversed
12/10/1996US5584037 Entry allocation in a circular buffer
12/05/1996WO1996038778A1 Adjustable fifo-based memory scheme
11/1996
11/28/1996WO1996037873A1 Display controller capable of accessing graphics data from a shared system memory
11/28/1996WO1996037821A1 Non-arithmetical circular buffer cell availability status indicator circuit
11/28/1996WO1996037820A1 Barrel shifter
11/28/1996WO1996037819A1 Method for performing a 'rotate through carry' operation
11/26/1996US5579465 Shifted character pattern data processor
11/20/1996EP0312615B1 Method and apparatus for data transfer
11/19/1996US5577192 Computer system
11/19/1996US5577190 Media editing system with adjustable source material compression
11/14/1996WO1996035986A1 Interface circuit and data processing apparatus and method
11/13/1996EP0742646A1 Data compression method and apparatus with expansion protection
11/12/1996US5574953 Storing compressed data in non-contiguous memory
11/05/1996US5572721 High speed serial interface between image enhancement logic and ros for implementation of image enhancement algorithms
11/05/1996US5572713 System and method for obtaining correct byte addresses by using logical operations on 2 least significant bits of byte address to facilitate compatibility between computer architectures having different memory orders
11/05/1996US5572698 System and method for allocating memory resources where the category of a memory resource determines where on a circular stack a pointer to the memory resource is placed
11/05/1996US5572697 Apparatus for recovering lost buffer contents in a data processing system
11/05/1996US5572209 Method and apparatus for compressing and decompressing data
11/05/1996US5572206 Data compression method and system
10/1996
10/30/1996EP0740464A1 Video apparatus with a single multi-port field memory
10/30/1996EP0740418A1 Controllable width OR gate
10/24/1996WO1996033457A1 Block-normalization in multiply-add floating point sequence without wait cycles
10/24/1996WO1996033455A1 A very fast pipelined shifter element with parity prediction
10/22/1996US5568443 Combination dual-port random access memory and multiple first-in-first-out (FIFO) buffer memories
10/17/1996WO1996032672A1 Apparatus and method for peripheral device control with integrated data compression
10/16/1996EP0737913A1 Scannable last-in-first-out register stack
10/15/1996US5566385 Integrated structure layout and layout of interconnections for an integrated circuit chip
10/15/1996US5566343 Serial data transfer apparatus for determining a reception time and a transmission time
10/10/1996WO1996031820A1 Method and apparatus for the management of queue pointers by multiple processors in a digital communications network
10/09/1996CN1132966A Tree structured binary arithmetic coder
10/08/1996US5563595 Method and apparatus for compressing data
10/03/1996WO1996030825A1 Storage system with a store operable as a ring store
10/02/1996DE19511774A1 Speicheranordnung mit einem als Ringspeicher betreibbaren Speicher Memory device having a memory operable as a circular buffer
10/01/1996US5561688 For compressing a stream of coded digital data samples
10/01/1996US5561633 Semiconductor memory device using serial pointer
10/01/1996US5561421 Access method data compression with system-built generic dictionaries
09/1996
09/26/1996WO1996029644A1 Arrangement and method relating to handling of digital signals and a processing arrangement comprising such
09/26/1996CA2216132A1 Arrangement and method relating to handling of digital signals and a processing arrangement comprising such
09/25/1996CN1131879A Data reproducing method and data reproducing apparatus
09/25/1996CN1131846A Viewdata space compression processing method
09/24/1996US5559730 Shift operation unit and shift operation method
09/18/1996EP0732854A2 Apparatus and methods for performing Huffman coding
09/18/1996EP0732655A1 Variable-length bit data processing circuit and method
09/18/1996EP0731943A1 Demand allocation of read/write buffer partitions favoring sequential read cache
09/17/1996US5557751 Method and apparatus for serial data communications using FIFO buffers
09/17/1996US5557750 Prefetch/prestore mechanism for peripheral controllers with shared internal bus
09/17/1996US5557733 Caching FIFO and method therefor
09/17/1996US5557575 Method for changing a flag signal
09/10/1996US5555524 Semi-synchronous dual port FIFO
09/10/1996US5555380 Data transfer system with buffer request including block length to update the buffer pointer prior to transferring of the block
09/10/1996US5555213 Interface circuit, system and method for interfacing an electronic device and a synchronous state machine having different clock speeds
09/10/1996US5555202 Low-power, high-performance barrel shifter
09/10/1996CA2071333C Method and apparatus for synchronizing the readout of a sequential media device with a separate clocked device
09/09/1996CA2170551A1 Apparatus and methods for performing huffman coding
09/03/1996US5553202 Accessory control device which transfers data from electronic device using part of address signal and latch
09/03/1996US5553041 Disc data reproducing apparatus and signal processing unit for preventing underflow and overflow
09/03/1996US5553010 Data shifting circuit capable of an original data width rotation and a double data width rotation
08/1996
08/28/1996EP0729237A2 Adaptive multiple dictionary data compression
08/28/1996EP0729106A1 Data interface
08/27/1996US5551009 Expandable high performance FIFO design which includes memory cells having respective cell multiplexors
08/27/1996US5550987 Data transfer device
08/27/1996US5550972 Method and apparatus for efficient transfer of data to memory
08/27/1996US5550780 Two cycle asynchronous FIFO queue
08/27/1996US5550768 Rounding normalizer for floating point arithmetic operations
08/27/1996US5550540 Distributed coding and prediction by use of contexts
08/22/1996WO1996025703A1 Optimization of the transfer of data word sequences
08/22/1996CA2212872A1 Optimization of the transfer of data word sequences
08/20/1996US5548728 System for reducing bus contention using counter of outstanding acknowledgement in sending processor and issuing of acknowledgement signal by receiving processor to indicate available space in shared memory
08/20/1996US5548534 Two stage clock dejitter circuit for regenerating an E4 telecommunications signal from the data component of an STS-3C signal
08/13/1996US5546575 Encoding method for compressing a tabular database by selecting effective compression routines for each field and structure of partitions of equal sized records
08/13/1996US5546389 Method of controlling access to a buffer and a device for temporary storage of data packets and an exchange with such a device
08/13/1996US5546347 Interleaving architecture and method for a high density FIFO
08/13/1996US5546080 Order-preserving, fast-decoding arithmetic coding arithmetic coding and compression method and apparatus
08/08/1996WO1996024208A1 System for signal transmission between plurality of lsis
08/07/1996EP0725485A2 Raster image data compression method and system
08/06/1996US5544326 Interface and control circuit for regulating data flow in a SCSI initiator with multiple host bus interface selection
08/01/1996WO1996023359A1 Device and method for encoding data and device and method for decoding data
08/01/1996WO1996023252A1 Data transmission system
08/01/1996DE19529690A1 Microcomputer with built in serial IO interface for connection to LAN
07/1996
07/30/1996US5542068 Method and system for storing floating point numbers to reduce storage space
07/25/1996WO1996022569A1 Self-diagnostic asynchronous data buffers
07/25/1996CA2210153A1 Self-diagnostic asynchronous data buffers
07/23/1996US5539896 Method and apparatus for dynamically linking code segments in real time in a multiprocessor computing system employing dual buffered shared memory
07/23/1996US5539684 Data processing system
07/22/1996EP0731943A4 Demand allocation of read/write buffer partitions favoring sequential read cache
07/18/1996WO1996021897A1 A data transmission system
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