Patents
Patents for G06F 5 - Methods or arrangements for data conversion without changing the order or content of the data handled (8,116)
05/1999
05/04/1999US5901076 Ripple carry shifter in a floating point arithmetic unit of a microprocessor
05/04/1999US5900753 Asynchronous interface
05/04/1999US5900013 Dual comparator scheme for detecting a wrap-around condition and generating a cancel signal for removing wrap-around buffer entries
04/1999
04/29/1999DE19849774A1 Byte switching circuit in arithmetic unit
04/28/1999EP0910824A2 Device provided with a recording unit and a memory
04/27/1999US5898896 Method and apparatus for data ordering of I/O transfers in Bi-modal Endian PowerPC systems
04/27/1999US5898893 Fifo memory system and method for controlling
04/27/1999US5898889 Qualified burst cache for transfer of data between disparate clock domains
04/22/1999WO1999019798A1 Method of emulating a shift register using a ram
04/22/1999WO1999019785A1 Apparatus and method for generating a distributed clock signal using gear ratio techniques
04/21/1999EP0910012A2 Method for storing data in a memory with random write access and sequential read access
04/21/1999EP0770292A4 Two stage clock dejitter circuit for regenerating an e4 telecommunications signal from the data component of an sts-3c signal
04/20/1999US5896541 Null convention register file
04/20/1999US5896305 Shifter circuit for an arithmetic logic unit in a microprocessor
04/15/1999DE19740936A1 Data in stack memory temporary storage method for LIFO or FIFO memory
04/14/1999EP0559649B1 Method and means for transferring a data payload from a first sonet signal to a sonet signal of different frequency
04/13/1999US5894567 Mechanism for enabling multi-bit counter values to reliably cross between clocking domains
04/13/1999US5893924 System and method for overflow queue processing
04/06/1999US5893162 Method and apparatus for allocation and management of shared memory with data in memory stored as multiple linked lists
04/06/1999US5892979 Queue control apparatus including memory to save data received when capacity of queue is less than a predetermined threshold
04/06/1999US5892920 Data transmission system buffer with tree shaped multiplexer controlled by different sending and receiving clock speeds
03/1999
03/31/1999EP0905921A2 Cyclic memory for a TDMA data transmission station
03/31/1999EP0905613A2 Method for storing and using executable programs and apparatus therefor
03/31/1999EP0905610A1 Dual port buffer
03/31/1999EP0905609A2 Register arrangement
03/30/1999US5890005 Low power, low interconnect complexity microprocessor and memory interface
03/30/1999US5889948 Apparatus and method for inserting an address in a data stream through a FIFO buffer
03/30/1999US5889481 Character compression and decompression device capable of handling a plurality of different languages in a single text
03/24/1999EP0903867A1 Method and apparatus for adaptive data compression exhibiting an improved compression efficiency
03/24/1999EP0903865A1 Method and apparatus for compressing data
03/24/1999EP0903663A2 Method and apparatus for operating a circular buffer addressable over a write ora read pointer
03/23/1999US5886998 Method and apparatus for interleave/de-interleave addressing in data communication circuits
03/18/1999WO1999013397A1 Fifo memory device using shared reconfigurable memory block
03/16/1999US5884099 Control circuit for a buffer memory to transfer data between systems operating at different speeds
03/16/1999US5884092 System for maintaining fixed-point data alignment within a combination CPU and DSP system
03/16/1999US5883840 Memory device and method for storing data according to the FIFO principle
03/16/1999US5883624 Document reference apparatus and method for displaying documents page by page and storage medium storing program used for realizing the apparatus and method
03/16/1999US5883529 Function clock generation circuit and D-type flip-flop equipped with enable function and memory circuit using same
03/11/1999WO1999012090A1 Interface circuit for full-custom and semi-custom timing domains
03/10/1999EP0901067A2 Method and system for executing operations on denormalised numbers
03/09/1999US5881255 Bus control system incorporating the coupling of two split-transaction busses of different hierarchy
03/09/1999US5880997 Bubbleback for FIFOS
03/03/1999EP0899652A2 Communication device, communication method and medium on which computer program for carrying out the method is recorded
02/1999
02/25/1999WO1999009467A2 A transient datastream-processing buffer memory organization with software management adapted for multilevel housekeeping
02/24/1999EP0897579A1 Memory device
02/23/1999US5875354 System for synchronization by modifying the rate of conversion by difference of rate between first clock and audio clock during a second time period
02/23/1999US5874908 Method and apparatus for encoding Lempel-Ziv 1 variants
02/23/1999US5874907 Method and apparatus for providing improved data compression efficiency for an adaptive data compressor
02/18/1999WO1998050850A3 Device provided with a recording unit and a memory
02/18/1999EP0910824A3 Device provided with a recording unit and a memory
02/17/1999CN1208299A Communication device, communication method and medium on which computer program for carrying out method is recorded
02/16/1999US5873089 Data handling system with circular queue formed in paged memory
02/16/1999US5872822 Method and apparatus for memory sequencing
02/16/1999US5872530 Method of and apparatus for compressing and decompressing data and data processing apparatus and network system using the same
02/16/1999CA2096717C Sonet tributary ambiguity resolution for elastic store control
02/09/1999US5870437 Apparatus and method for detecting end of serial bit stream
02/09/1999US5870036 Adaptive multiple dictionary data compression
02/03/1999CN1206953A Integrated circuit, system and method for reducing distortion between clock signal and data signal
02/02/1999US5867695 Method in a data processing system
02/02/1999US5867672 Triple-bus FIFO buffers that can be chained together to increase buffer depth
02/02/1999US5867413 Fast method of floating-point multiplication and accumulation
02/02/1999US5867407 Normalization shift prediction independent of operand substraction
01/1999
01/28/1999DE19804384A1 Semiconductor memory for first-in-first-out (FIFO) system
01/27/1999EP0893768A2 An implementation system of an elastic memory
01/27/1999EP0893755A2 Buffer storage device
01/26/1999US5864713 Method for determining if data should be written at the beginning of a buffer depending on space available after unread data in the buffer
01/21/1999DE19806299A1 Normalisation circuit arrangement
01/20/1999EP0891581A1 Fifo memory system
01/20/1999EP0832457A4 Split buffer architecture
01/20/1999CN1205815A System related to transmission buffer
01/19/1999US5862410 System for controlling a variable source by the feedback of the running mode, and relevant circuit
01/19/1999US5862409 Buffer capacity change monitoring method and apparatus
01/19/1999US5862092 Read bitline writer for fallthru in fifos
01/19/1999CA2065979C Mode dependent minimum fifo fill level controls processor access to video memory
01/14/1999WO1998036587A3 Queuing structure and method for prioritization of frames in a network switch
01/13/1999CN1205103A Recording and reproducing system for simultaneous recording and reproduction via information carrier
01/12/1999US5860149 Memory buffer system using a single pointer to reference multiple associated data
01/12/1999US5860119 Data-packet fifo buffer system with end-of-packet flags
01/12/1999CA2005048C Data compression
01/07/1999EP0889392A2 Data structure and method for managing multiple ordered sets
01/05/1999US5857005 Method and apparatus for synchronizing transfer of data between memory cells
01/05/1999US5856800 Analog-to-digital converter having a high sampling frequency
01/05/1999US5856797 Data encoding device, data decoding device, data encoding method and data decoding method
01/05/1999CA2142235C Fifo queue having replaceable entries
12/1998
12/23/1998EP0886454A2 Method and apparatus to expand an on-chip fifo into local memory
12/23/1998EP0886220A2 Low power memory bus interface
12/22/1998US5852748 Programmable read-write word line equality signal generation for FIFOs
12/22/1998US5852710 Apparatus and method for storing image data into memory
12/22/1998US5852608 Electronic system
12/15/1998US5850568 Circuit having plurality of carry/sum adders having read count, write count, and offset inputs to generate an output flag in response to FIFO fullness
12/10/1998WO1998055916A1 Noise reduction in an image
12/09/1998CN1201238A Storage integrated circuit and main storage system and figure storage system thereof using same
12/09/1998CN1201194A Method and apparatus for managing communication buffer of block communication data of printer
12/02/1998CN1200822A Set of instructions for operating on packed data
12/02/1998CN1200821A Apparatus for performing multiply-add operations on packed data
12/02/1998CN1200604A Data compression method and apparatus
12/01/1998US5845314 Data storage apparatus, data reading apparatus and data transmission apparatus
12/01/1998US5844828 Shift circuit and system having the same
12/01/1998US5844827 Arithmetic shifter that performs multiply/divide by two to the nth power for positive and negative N
12/01/1998US5844825 For shifting an inputted data word
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