| Patents for G06F 5 - Methods or arrangements for data conversion without changing the order or content of the data handled (8,116) |
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| 05/02/2000 | US6057720 High speed sticky signal generator |
| 04/26/2000 | EP0996229A2 Electronic circuit device having a recirculating memory buffer (FIFO) |
| 04/25/2000 | US6055616 System for efficient implementation of multi-ported logic FIFO structures in a processor |
| 04/25/2000 | US6055590 Bridge circuit comprising independent transaction buffers with control logic adapted to store overflow data in second buffer when transaction size exceeds the first buffer size |
| 04/25/2000 | US6055588 Single stage FIFO memory with a circuit enabling memory to be read from and written to during a single cycle from a single clock |
| 04/25/2000 | US6055285 Synchronization circuit for transferring pointer between two asynchronous circuits |
| 04/20/2000 | WO2000022890A2 Intelligent flashing |
| 04/20/2000 | WO2000022812A1 Data converter, computer, and printer |
| 04/20/2000 | WO2000022513A1 Endian transformation |
| 04/20/2000 | DE19846454A1 Elektronische Schaltungsanordnung Electronic circuitry |
| 04/20/2000 | CA2345696A1 Intelligent electrical devices |
| 04/19/2000 | EP0621533B1 Barrel shifter |
| 04/18/2000 | US6052770 Asynchronous register |
| 04/18/2000 | US6052522 Method and apparatus for extracting data stored in concatenated registers |
| 04/12/2000 | EP0992917A1 Linear vector computation |
| 04/12/2000 | EP0992916A1 Digital signal processor |
| 04/12/2000 | EP0992907A2 Trace fifo management |
| 04/12/2000 | EP0992906A2 Software breakpoint in a delay slot |
| 04/12/2000 | EP0992905A2 Cache miss benchmarking |
| 04/12/2000 | EP0992904A2 Cache coherence during emulation |
| 04/12/2000 | EP0992902A2 Dual interrupt vector mapping |
| 04/12/2000 | EP0992897A2 Stack pointer management |
| 04/12/2000 | EP0992890A2 A processor |
| 04/12/2000 | EP0992887A2 Memory access using byte qualifiers |
| 04/12/2000 | EP0992882A2 Bit field processor |
| 04/12/2000 | EP0992880A1 Circular buffer management |
| 04/11/2000 | US6049858 Modulo address generator with precomputed comparison and correction terms |
| 04/11/2000 | US6049842 Efficient data transfer mechanism for input/output devices |
| 04/11/2000 | US6049802 System and method for generating a linked list in a computer memory |
| 04/11/2000 | CA2068867C Clock dejitter circuits for regenerating jittered clock signals |
| 04/06/2000 | WO1999065026A3 Transferring compressed audio via a playback buffer |
| 04/06/2000 | WO1999055000A3 Differential receiver using a delay lock loop to compensate skew |
| 04/05/2000 | EP0991195A2 Data converting method and apparatus therefor |
| 04/05/2000 | EP0991018A2 Method and apparatus for compressing data |
| 04/05/2000 | EP0990990A2 Flow control in a fifo memory |
| 04/05/2000 | CN1249515A Data conversion method and device |
| 04/05/2000 | CN1249464A Buffer management unit and method for improving utilization ratio of buffer and access performance of buffer |
| 04/05/2000 | CN1249461A Element testing and switching device |
| 04/04/2000 | US6047364 True modulo addressing generator |
| 04/04/2000 | US6047339 Buffering data that flows between buses operating at different frequencies |
| 04/04/2000 | US6046931 Method and apparatus for a RAM circuit having N-nary output interface |
| 04/04/2000 | US6046817 Method and apparatus for dynamic buffering of input/output ports used for receiving and transmitting print data at a printer |
| 03/30/2000 | WO2000017744A1 High frequency pipeline decoupling queue design |
| 03/29/2000 | EP0989484A2 Method and apparatus for synchronizing a data stream |
| 03/28/2000 | US6044474 Memory controller with buffered CAS/RAS external synchronization capability for reducing the effects of clock-to-signal skew |
| 03/28/2000 | US6044434 Circular buffer for processing audio samples |
| 03/28/2000 | US6044431 Data buffer using dummy data |
| 03/28/2000 | US6044419 Memory handling system that backfills dual-port buffer from overflow buffer when dual-port buffer is no longer full |
| 03/28/2000 | US6044416 Configurable first-in first-out memory interface |
| 03/28/2000 | US6044031 Programmable bit line drive modes for memory arrays |
| 03/28/2000 | US6044030 FIFO unit with single pointer |
| 03/28/2000 | US6043762 Hardware bit coder |
| 03/23/2000 | DE19943174A1 SDRAM address converter for imaging flat address space and data buffers for storing data packages working on SDRAM address space; assigns memory space into buffers through buffer manager for reserving storage locations |
| 03/23/2000 | DE19941196A1 Two-channel first-in first-out (FIFO) memory with synchronized read-out and write address indicators |
| 03/21/2000 | US6041418 Race free and technology independent flag generating circuitry associated with two asynchronous clocks |
| 03/21/2000 | US6041397 Efficient transmission buffer management system |
| 03/21/2000 | US6041370 FIFO using a fading ones counter |
| 03/15/2000 | EP0986005A1 FIFO memory device and method for controlling same |
| 03/14/2000 | US6038649 Address generating circuit for block repeat addressing for a pipelined processor |
| 03/14/2000 | US6038621 Dynamic peripheral control of I/O buffers in peripherals with modular I/O |
| 03/14/2000 | US6038576 Bit-depth increase by bit replication |
| 03/14/2000 | US6038192 Memory cells for field programmable memory array |
| 03/09/2000 | WO2000013094A1 Fifo using asynchronous logic |
| 03/09/2000 | CA2341981A1 Fifo using asynchronous logic |
| 03/08/2000 | CN1050212C First-in first-out buffer memory |
| 03/07/2000 | US6035348 Method for managing multiple ordered sets by dequeuing selected data packet from single memory structure |
| 03/07/2000 | US6035310 Method and circuit for performing a shift arithmetic right operation |
| 03/07/2000 | US6033441 Method and apparatus for synchronizing data transfer |
| 03/01/2000 | EP0982734A1 A solid-state audio recording unit |
| 02/29/2000 | US6032206 Method of reducing access when passing data from external memory through buffer to data processor by allocating buffer portion for receiving external memory's identification data |
| 02/24/2000 | DE19837101A1 Programmierbare 1-Bit Datenverarbeitungsanordnung Programmable 1-bit data processing device |
| 02/23/2000 | EP0981079A2 Programmable one bit data processing apparatus |
| 02/22/2000 | US6029253 Method for synchronizing data with a bi-directional buffer |
| 02/22/2000 | US6029250 Method and apparatus for adaptively adjusting the timing offset between a clock signal and digital signals transmitted coincident with that clock signal, and memory device and system using same |
| 02/22/2000 | US6029234 Output synchronization method and apparatus in a memory system utilizing small buffer size |
| 02/22/2000 | US6029184 Method of performing unsigned operations with signed instructions in a microprocessor |
| 02/15/2000 | US6026473 Method and apparatus for storing data in a sequentially written memory using an interleaving mechanism |
| 02/15/2000 | US6026451 System for controlling a dispatch of requested data packets by generating size signals for buffer space availability and preventing a dispatch prior to a data request granted signal asserted |
| 02/15/2000 | US6026198 Data compression and restoration system for encoding an input character on the basis of a conditional appearance rate obtained in relation to an immediately preceding character string |
| 02/15/2000 | US6026032 High speed data buffer using a virtual first-in-first-out register |
| 02/10/2000 | WO2000007093A1 Storage device and a method for operating the storage device |
| 02/10/2000 | WO1999056457A3 Portable data transmission system for global and local computer networks |
| 02/08/2000 | US6023421 Selective connectivity between memory sub-arrays and a hierarchical bit line structure in a memory array |
| 02/08/2000 | US6023234 EFM encoder and DSV calculator |
| 02/02/2000 | EP0977109A1 Method and apparatus for synchronizing data transfers in a logic circuit having plural clock domains |
| 02/02/2000 | EP0976226A1 Integrated multiport switch having shared media access control circuitry |
| 02/02/2000 | CN1049053C Method and system for buffer storing bandwidth data from an input device |
| 02/01/2000 | US6021487 Method and apparatus for providing a signed integer divide by a power of two |
| 02/01/2000 | US6021225 Image processing apparatus |
| 01/27/2000 | WO2000004543A1 Method and apparatus for decoding |
| 01/26/2000 | EP0974099A2 Video graphics controller having locked and unlocked modes of operation |
| 01/25/2000 | US6018756 Reduced-latency floating-point pipeline using normalization shifts of both operands |
| 01/25/2000 | US6018612 Arrangement for storing an information signal in a memory and for retrieving the information signal from said memory |
| 01/19/2000 | EP0820612A4 Apparatus and method for peripheral device control with integrated data compression |
| 01/18/2000 | US6016403 State machine design for generating empty and full flags in an asynchronous FIFO |
| 01/18/2000 | US6016396 Parallel code conversion processing method and parallel code conversion processing system |
| 01/18/2000 | CA2028329C Cell exchanging apparatus |
| 01/13/2000 | DE19830625A1 Digital interface for fuel injection system |
| 01/12/2000 | EP0970419A1 A lempel-ziv data compression technique utilizing a dicionary pre-filled with fequent letter combinations, words and/or phrases |
| 01/12/2000 | EP0965129A4 Recursive multi-channel interface |