Patents
Patents for G06F 5 - Methods or arrangements for data conversion without changing the order or content of the data handled (8,116)
09/1999
09/28/1999US5957997 Efficient floating point normalization mechanism
09/28/1999CA2139095C Real-time digital audio compression/decompression system
09/22/1999CN1229481A Device provided with recording unit and memory
09/21/1999US5956748 Asynchronous, dual-port, RAM-based FIFO with bi-directional address synchronization
09/21/1999US5956492 N-deep fixed latency fall-through FIFO architecture
09/21/1999US5956287 Semiconductor memory
09/21/1999US5955897 Signal generation decoder circuit and method
09/21/1999US5954807 Computer
09/15/1999EP0834113B1 Information processing apparatus and method including a mechanism for issuing and removing requests for memory access
09/14/1999US5953521 Data-pattern induced skew reducer
09/14/1999US5953020 Display FIFO memory management system
09/14/1999US5951657 Cacheable interface control registers for high speed data transfer
09/14/1999US5951656 Method and system for controlling queue deletions in which pointer corresponding to item to be deleted is moved back and pointers for items after deleted item are shifted
09/14/1999US5951635 Asynchronous FIFO controller
09/14/1999US5951623 Lempel- Ziv data compression technique utilizing a dictionary pre-filled with frequent letter combinations, words and/or phrases
09/07/1999US5949787 Integtated circuit
09/07/1999US5949719 Field programmable memory array
09/07/1999US5948099 Apparatus and method for swapping the byte order of a data item to effectuate memory format conversion
09/07/1999US5948082 Computer system having a data buffering system which includes a main ring buffer comprised of a plurality of sub-ring buffers connected in a ring
09/07/1999US5948050 Fast conversion two's complement encoded shift value for a barrel shifter
09/07/1999US5948049 Normalization circuitry
08/1999
08/31/1999US5946000 Memory construct using a LIFO stack and a FIFO queue
08/24/1999US5943509 Small size inter-processor data transfer system
08/24/1999US5943249 Method and apparatus to perform pipelined denormalization of floating-point results
08/24/1999US5942996 Apparatus and method enabling unimpeded communication between different classes of equipment utilizing different byte protocols
08/24/1999US5941973 Bus control system incorporating the coupling of two split-transaction busses of different hierarchy
08/24/1999US5941961 Data buffering system including buffer memory shared between channel data groups whereas buffer memory is divided into memory areas for storing different types of channel data groups
08/24/1999US5941937 Layout structure for barrel shifter with decode circuit
08/19/1999WO1999041670A1 System for dynamically changing draining priority of a receive fifo
08/18/1999EP0936564A2 Bit and digit reversal methods
08/17/1999US5940312 Signed binary logarithm system
08/17/1999US5940311 Immediate floating-point operand reformatting in a microprocessor
08/17/1999US5940146 Video apparatus with image memory function
08/17/1999US5938749 Queue measurement apparatus and methodology
08/17/1999CA2097635C Real-data fft buffer
08/10/1999US5937430 Buffer circuit with control device to directly output input data or to output input data written in storage device
08/10/1999US5937177 Control structure for a high-speed asynchronous pipeline
08/10/1999US5936560 Data compression method and apparatus performing high-speed comparison between data stored in a dictionary window and data to be compressed
08/04/1999EP0932862A2 A transient datastream-processing buffer memory organization with software management adapted for multilevel housekeeping
08/03/1999US5933650 In a computer system
08/03/1999US5933615 Optimization of the transfer of data word sequences
08/03/1999US5933155 System and method for buffering multiple frames while controlling latency
08/03/1999US5931926 Method and apparatus for dynamically calculating degrees of fullness of a synchronous FIFO
08/03/1999US5931895 Floating-point arithmetic processing apparatus
07/1999
07/29/1999WO1999026145A3 Video graphics controller having locked and unlocked modes of operation
07/28/1999EP0932098A2 Computer system and method for allocating memory space for communications port buffers
07/27/1999US5930311 Circuitry for retiming a received data signal
07/27/1999US5930176 Multiple word width memory array clocking scheme
07/27/1999US5930159 Right-shifting an integer operand and rounding a fractional intermediate result to obtain a rounded integer result
07/27/1999US5929676 Asynchronous pulse discriminating synchronizing clock pulse generator for logic derived clock signals for a programmable device
07/22/1999WO1999036849A1 Write-buffer fifo architecture with random access snooping capability
07/21/1999EP0930718A2 Tandem operation of input/output data compression modules
07/20/1999US5926786 Digital signal processor
07/20/1999US5926407 Combined add/shift structure
07/15/1999WO1999035563A1 Method of asynchronous management of a circular queue in a multiprocess environment
07/13/1999US5923900 Circular buffer with n sequential real and virtual entry positions for selectively inhibiting n adjacent entry positions including the virtual entry positions
07/13/1999US5923895 Method and arrangement to effectively retrieve residual data from a buffer
07/13/1999US5923574 Optimized, combined leading zeros counter and shifter
07/13/1999US5923198 High-speed clock-synchronous semiconductor integrated circuit and semiconductor integrated circuit system
07/13/1999US5922066 Multifunction data aligner in wide data width processor
07/06/1999US5920899 Asynchronous pipeline whose stages generate output request before latching data
07/06/1999US5919251 Search mechanism for a rotating pointer buffer
07/01/1999WO1999022302B1 Buffering data that flows between buses operating at different frequencies
06/1999
06/29/1999US5918252 Apparatus and method for generating a modulo address
06/29/1999US5918073 Computer system
06/29/1999US5917505 Computer system
06/29/1999US5916309 System for dynamically determining the size and number of communication buffers based on communication parameters at the beginning of the reception of message
06/23/1999EP0923760A1 Noise reduction in an image
06/22/1999US5915128 Serial speed-matching buffer utilizing plurality of registers where each register selectively receives data from transferring units or sequentially transfers data to another register
06/22/1999US5914906 Field programmable memory array
06/22/1999US5914897 FIFO memory device having address detection portion
06/16/1999EP0803104B1 Number formatting framework
06/15/1999US5913229 Buffer memory controller storing and extracting data of varying bit lengths
06/10/1999WO1999028816A1 Dynamic memory allocation
06/09/1999EP0921461A2 Bit-Depth Increase by bit replication
06/08/1999US5911152 Computer system and method for storing data in a buffer which crosses page boundaries utilizing beginning and ending buffer pointers
06/08/1999US5911083 Programmable processor execution rate controller
06/08/1999US5910742 Circuit and method for data recovery
06/01/1999US5909552 Method and apparatus for processing packed data
06/01/1999US5909451 System and method for providing scan chain for digital electronic device having multiple clock domains
06/01/1999US5909185 Lookup table device and signal conversion method
05/1999
05/27/1999WO1999026145A2 Video graphics controller having locked and unlocked modes of operation
05/27/1999WO1999026130A1 Remote control system which minimizes screen refresh time by selecting compression algorithm
05/25/1999US5907716 Fifo buffer capable of partially erasing data set held therein
05/25/1999US5907637 Method and apparatus for compressing and decompressing data
05/18/1999US5905978 Window size determination using fuzzy logic
05/18/1999US5905766 Synchronizer, method and system for transferring data
05/18/1999US5905665 Modulo address generating circuit and method with reduced area and delay using low speed adders
05/18/1999US5905587 Optical network device
05/18/1999CA2130064C Method and apparatus for transferring data between a host processor and a subsystem processor in a data processing system
05/12/1999CN1043383C Improved method for interchange code conversion of multi-byte character string characters
05/11/1999US5903779 System and method for efficient packing data into an output buffer
05/11/1999US5903570 Timing circuit using handshake connections
05/11/1999US5903479 Method and system for executing denormalized numbers
05/06/1999WO1999022302A1 Buffering data that flows between buses operating at different frequencies
05/06/1999WO1999009467A3 A transient datastream-processing buffer memory organization with software management adapted for multilevel housekeeping
05/06/1999EP0913764A1 Method and apparatus for shifting data
05/06/1999EP0912926A1 Unified load/store unit for a superscalar microprocessor and method of operating the same
05/04/1999US5901290 Data transfer apparatus for transferring data fixedly in predetermined time interval without a transmitter checking a signal from a receiver
05/04/1999US5901100 First-in, first-out integrated circuit memory device utilizing a dynamic random access memory array for data storage implemented in conjunction with an associated static random access memory cache
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