Patents
Patents for G06F 5 - Methods or arrangements for data conversion without changing the order or content of the data handled (8,116)
12/1998
12/01/1998US5844508 Data coding method, data decoding method, data compression apparatus, and data decompression apparatus
12/01/1998US5844423 Half-full flag generator for synchronous FIFOs
11/1998
11/26/1998DE19737589C1 Interface arrangement for IC with full-custom and semi-custom clock domain
11/25/1998EP0880100A2 Cache-based data compression/decompression
11/24/1998US5842042 Data transfer control method for controlling transfer of data through a buffer without causing the buffer to become empty or overflow
11/24/1998US5841953 Method for compressing and decompressing data files
11/24/1998US5841938 Data reproducing method and data reproducing apparatus
11/24/1998US5841722 First-in, first-out (FIFO) buffer
11/24/1998US5841376 Data compression and decompression scheme using a search tree in which each entry is stored with an infinite-length character string
11/24/1998CA2108460C Vocabulary memory allocation for adaptive data compression of frame-multiplexed traffic
11/18/1998EP0878914A2 Data compression method and apparatus
11/18/1998EP0878757A2 Method and apparatus for dynamically managing communication buffers used with packet communication data for a printer
11/18/1998EP0878753A2 Data content dealing system
11/17/1998US5838996 Digital signal managing apparatus
11/17/1998US5838821 Method and apparatus for selecting compression method and for compressing file using the selected method
11/12/1998WO1998050850A2 Device provided with a recording unit and a memory
11/05/1998WO1998049616A1 An apparatus and method for bit reversing and shifting
11/04/1998CN1198062A Descrambling device of security element and security element comprising such device
11/03/1998US5832469 Electronic system organized as a matrix network of functional cells
11/03/1998US5832126 Method and apparatus for compressing mixed text and image data
11/03/1998US5831871 Integrated structure layout and layout of interconnections for an instruction execution unit of an integrated circuit chip
11/03/1998US5831467 Termination circuit with power-down mode for use in circuit module architecture
10/1998
10/21/1998EP0695454B1 Vocoder asic
10/20/1998US5826041 Method and system for buffering network packets that are transferred between a V86 mode network driver and a protected mode computer program
10/13/1998US5822557 Pipelined data processing device having improved hardware control over an arithmetic operations unit
10/13/1998US5822329 Data-transmitter-receiver
10/13/1998US5822231 Ternary based shifter that supports multiple data types for shift functions
10/07/1998EP0869432A1 Multiplication method and multiplication circuit
10/07/1998EP0869431A1 Serial communication circuit
10/07/1998EP0869430A2 Fifo memory device
10/06/1998US5819111 System for managing transfer of data by delaying flow controlling of data through the interface controller until the run length encoded data transfer is complete
10/06/1998US5818873 Single clock cycle data compressor/decompressor with a string reversal mechanism
10/06/1998US5818739 Processor for performing shift operations on packed data
09/1998
09/30/1998EP0867801A1 Bit rate control interface for the recording and/or reading of digital data
09/29/1998US5815146 Video on demand system with multiple data sources configured to provide VCR-like services
09/29/1998US5815098 Circuit and method for efficiently expanding compressed data stored in memory
09/23/1998EP0866406A1 Notification of message arrival in a parallel computer system
09/22/1998US5813011 Storage of a compressed file containing its own compression management table
09/22/1998US5812866 For digital processing video signals
09/22/1998US5812792 Use of video DRAM for memory storage in a local area network port of a switching hub
09/22/1998US5812076 Data compressing apparatus, data restoring apparatus and recording medium
09/16/1998EP0864977A1 Memory latency compensation
09/16/1998EP0864967A1 Determination of sequential priority in a circular buffer
09/16/1998CN1193141A Definition of order priority in ring buffer area
09/15/1998US5809557 Memory array comprised of multiple FIFO devices
09/15/1998US5809521 Single and multistage stage fifo designs for data transfer synchronizers
09/15/1998US5809339 State machine design for generating half-full and half-empty flags in an asynchronous FIFO
09/11/1998WO1998039772A1 Recursive multi-channel interface
09/09/1998EP0809826B1 Optimization of the transfer of data word sequences
09/08/1998US5806084 Space saving method and floor plan for fabricating an integrated circuit comprising a high density buffer memory
09/08/1998US5805930 System for FIFO informing the availability of stages to store commands which include data and virtual address sent directly from application programs
09/08/1998US5805489 Digital microprocessor device having variable-delay division hardware
09/03/1998DE4200667C2 Schaltungsanordnung zur Fehlerüberwachung eines Pufferspeichers Circuit arrangement for fault monitoring of a buffer
09/02/1998EP0861490A1 Recording and reproducing system for simultaneous recording and reproduction via an information carrier
09/01/1998US5802351 Data interface
09/01/1998US5802331 Data processing system comprising an asynchronously controlled pipeline
08/1998
08/26/1998EP0860085A1 Digital coding
08/25/1998US5799314 System and method of controlling mapping of data buffers for heterogenous programs in digital computer system
08/25/1998US5799175 Synchronization system and method for plesiochronous signaling
08/25/1998US5799138 Digital data processing apparatus
08/25/1998US5798804 Image decoder for decoding variable-length image data using frame synchronizing signal and method of decoding the image data
08/25/1998US5798718 Sliding window data compression method and apparatus
08/20/1998WO1998036587A2 Queuing structure and method for prioritization of frames in a network switch
08/20/1998WO1998036539A1 Apparatus and method for synthesizing management packets for transmission between a network switch and a host controller
08/20/1998WO1998036538A1 Integrated multiport switch having management information base (mib) interface temporary storage
08/20/1998WO1998036536A1 Method and apparatus for reclaiming buffers
08/20/1998WO1998036535A1 Integrated multiport switch having shared media access control circuitry
08/20/1998WO1998036534A1 Split-queue architecture and method of queuing
08/20/1998WO1998036531A1 Method and apparatus for controlling initiation of transmission of data as a function of received data
08/20/1998WO1998036530A1 Multicopy queue structure with searchable cache area
08/20/1998WO1998036528A1 Method and apparatus for transmitting multiple copies by replicating data identifiers
08/20/1998WO1998036358A1 Method and apparatus for maintaining a time order by physical ordering in a memory
08/20/1998WO1998036357A1 Shared memory control using multiple linked lists with pointers, status flags, memory block counters and parity
08/20/1998CA2277981A1 Shared memory control using multiple linked lists with pointers, status flags, memory block counters and parity
08/19/1998EP0859311A1 First in, first out (FIFO) data buffering system
08/19/1998EP0645065B1 Method and equipment for monitoring the fill rate of an elastic buffer memory in a synchronous digital telecommunication system
08/18/1998US5797042 Method and apparatus for adjusting the buffering characteristic in the pipeline of a data transfer system
08/18/1998US5796962 Null convention bus
08/18/1998US5796796 Pointer adjustment jitter cancellation processor utilizing phase hopping and phase leaking techniques
08/13/1998DE19802868A1 Real-film data acquisition device
08/13/1998DE19704322A1 First-in first-out digital data store with counter comparator
08/12/1998EP0858185A1 Descrambling device of a security element and security element comprising such a device
08/12/1998EP0858038A1 Method and apparatus of exchanging data between decentralised electronic modules
08/11/1998US5793823 Synchronization circuit that captures and phases an external signal
08/11/1998US5793654 Saturating alignment shifter
08/04/1998US5790891 Synchronizing unit having two registers serially connected to one clocked elements and a latch unit for alternately activating the registers in accordance to clock signals
08/04/1998US5790445 Method and system for performing a high speed floating point add operation
08/04/1998US5790444 Fast alignment unit for multiply-add floating point unit
08/04/1998US5790125 System and method for use in a computerized imaging system to efficiently transfer graphics information to a graphics subsystem employing masked span
07/1998
07/30/1998WO1998033281A1 Device and method for generating compressed data
07/28/1998US5787273 Multiple parallel identical finite state machines which share combinatorial logic
07/28/1998US5786777 Data compression communication method between a main control unit and terminals
07/28/1998CA2077271C Method and apparatus for compressing data
07/22/1998EP0854425A2 Device and method for increasing data security with circular buffer
07/21/1998US5784532 Application specific integrated circuit (ASIC) for performing rapid speech compression in a mobile telephone system
07/16/1998DE19748547A1 Modulo address generator circuit for digital signal processing
07/14/1998US5781802 First-in-first-out (FIFO) controller for buffering data between systems which are asynchronous and free of false flags and internal metastability
07/09/1998DE19756929A1 Cell array and read-out amplifier structure for semiconductor memory
07/08/1998EP0852037A1 Unicode converter
07/07/1998US5778420 External storage device and external storage control device with means for optimizing buffer full/empty ratio
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