Patents
Patents for G01R 31 - Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere (152,264)
10/2003
10/09/2003WO2003083498A1 System and method for measuring fuel cell voltage and high frequency resistance
10/09/2003WO2003083496A1 Testable cascode circuit and method for testing the same
10/09/2003WO2003083494A1 Test probe alignment apparatus
10/09/2003WO2003039904A3 Method and circuit for detecting a fault of semiconductor circuit elements and use thereof in electronic regulators of braking force and of dynamics movement of vehicles
10/09/2003WO2003031997A3 Remote-programming of pld modules via a boundary scan in the system
10/09/2003WO2003031686A3 Cathodic protection remote monitoring method and apparatus
10/09/2003WO2002033433A3 Built-in-self-test circuitry for testing a phase locked loop circuit
10/09/2003WO2002029569A3 A system and method to enhance manufacturing test failure analysis with dedicated pins
10/09/2003WO2002029422A3 A scan test system and method for manipulating logic values that remain constant during normal operations
10/09/2003US20030192024 Configurable scan path structure
10/09/2003US20030192014 Simulator of dynamic circuit for silicon critical path debug
10/09/2003US20030191998 Built-in self test circuit
10/09/2003US20030191997 Device and method for testing integrated circuit dice in an integrated circuit module
10/09/2003US20030191996 Scheduling the concurrent testing of multiple cores embedded in an integrated circuit
10/09/2003US20030191993 Semiconductor device for memory test with changing address information
10/09/2003US20030189903 System and method for sequential testing of high speed serial link core
10/09/2003US20030189841 Electrical system like a testing system for testing the channels of a communication system
10/09/2003US20030189803 Electrical system like a testing system for testing the channels of a communication system
10/09/2003US20030189465 System and method for measuring circuit performance degradation due to PFET negative bias temperature instability (NBTI)
10/09/2003US20030189453 Radio frequency clamping circuit
10/09/2003US20030189440 Method, apparatus and software for testing a device including both electrical and optical portions
10/09/2003US20030189436 Method and test structure for determining resistances at a plurality of interconnected resistors in an integrated circuit
10/09/2003US20030189431 Process for identifying abnormalities in power transformers
10/09/2003US20030189430 Electrical system like a testing system for testing the channels of a communication system
10/09/2003US20030189429 Estimated remaining lamp life indicator system
10/09/2003US20030189424 Method and apparatus for prevention of probe card damage, when used with a manual wafer prober
10/09/2003US20030189421 Lithium-ion cell voltage telemetry circuit
10/09/2003US20030189419 Multiplex voltage measurement apparatus
10/09/2003US20030189418 Operational mode-based battery monitoring for a battery-powered electronic device
10/09/2003US20030189417 Method of controlling the charging of a battery
10/09/2003US20030189083 Solderless test interface for a semiconductor device package
10/09/2003DE10056825C2 Verfahren, Vorrichtung und Computerprogramm zum Erzeugen eines Zufallstestcodes Method, apparatus and computer program for generating a random test code
10/09/2003CA2476389A1 Test probe alignment apparatus
10/08/2003EP1351068A2 Battery state of charge indicator
10/08/2003EP1351067A1 Transition tracking
10/08/2003EP1351066A1 Configurable scan path structure
10/08/2003EP1351065A1 A field programmable device
10/08/2003EP1350292A2 Condition diagnosing
10/08/2003EP1350096A2 Electro-optic system controller and method of operation
10/08/2003EP1247107B1 Test device for a semiconductor component
10/08/2003EP1149292B1 Device for testing cables that are provided with plug connectors
10/08/2003CN2578839Y GIS quick instantaneous voltage measuring sensor
10/08/2003CN2578838Y Collector electrode voltage automatic regulator of graphic instrument
10/08/2003CN1447922A Test system for smart card and identification devices and like
10/08/2003CN1447335A Multiport scanning chain register device and method
10/08/2003CN1447204A Output circuit for density grade control, its detector and detection method
10/08/2003CN1447124A Method for detecting ground fault in DC system
10/08/2003CN1447123A Quasi-true examination for current mutual-inductor in substation
10/08/2003CN1447112A Method of judging residual film through optical measurement
10/08/2003CN1123782C Centipede-shaped large area single solar cell testing fixture
10/08/2003CN1123781C 2-D scan tree structure for measurable scan design of low-power integrated circuits
10/08/2003CN1123780C System and method for screening ICT test blindspots to make mask board for visual check
10/08/2003CN1123779C Failure tester for electric power cable
10/08/2003CN1123778C Method and probe for searching single-phase grounding failure
10/08/2003CN1123777C Method and appts. for on-line testing lightning arrester
10/07/2003US6631508 Method and apparatus for developing and placing a circuit design
10/07/2003US6631504 Hierarchical test circuit structure for chips with multiple circuit blocks
10/07/2003US6631487 On-line testing of field programmable gate array resources
10/07/2003US6631486 Semiconductor integrated circuit and method for testing the same
10/07/2003US6631340 Application specific event based semiconductor memory test system
10/07/2003US6631336 Nondestructive method of quality control of high-voltage systems and device for use of the method
10/07/2003US6631293 Method for monitoring end of life for battery
10/07/2003US6631115 Method, apparatus and program product for balancing communication loads over a network
10/07/2003US6631092 Semiconductor memory device capable of imposing large stress on transistor
10/07/2003US6630840 Array substrate inspection method with varying non-selection signal
10/07/2003US6630839 Contactor, a method of manufacturing the contactor and a device and method of testing electronic component using the contactor
10/07/2003US6630838 Method for implementing dynamic burn-in testing using static test signals
10/07/2003US6630837 Apparatus for testing bumped die
10/07/2003US6630832 Method and apparatus for the electrical testing of printed circuit boards employing intermediate layer grounding
10/07/2003US6630814 Method and apparatus for calibrating a rechargeable battery
10/07/2003US6630685 Semiconductor substrate, probe card, and methods for stressing and testing dies on a semiconductor substrate are provided. The semiconductor substrate, typically a semiconductor wafer, comprises dies disposed thereon and a redistribution layer for
10/07/2003US6629812 Method and apparatus for circulating pallets in an elevator unit of the module IC handler
10/07/2003US6629638 Electro-optic system controller and method of operation
10/03/2003CA2380201A1 A method and apparatus for detecting partial discharge in a voltage transformer
10/02/2003WO2003081747A2 Method and system for monitoring winding insulation resistance
10/02/2003WO2003081400A2 Integrated circuit security and method therefor
10/02/2003WO2003081270A1 Relay testing device
10/02/2003WO2003081269A1 Scatterometry structure with embedded ring oscillator, and methods of using same
10/02/2003WO2003081267A1 Programmable monitoring circuit
10/02/2003WO2003008984A3 Test head docking system and method
10/02/2003WO2003005442A3 Device and method for measuring operating temperatures of an electrical component
10/02/2003WO2002054240A3 Enhanced loopback testing of serial devices
10/02/2003WO2002039629A3 Channel time calibration means
10/02/2003US20030188282 Design flow method for integrated circuits
10/02/2003US20030188273 Simulation-based technique for contention avoidance in automatic test pattern generation
10/02/2003US20030188269 Compacting circuit responses
10/02/2003US20030188246 Method and apparatus for deriving a bounded set of path delay test patterns covering all transition faults
10/02/2003US20030188245 Sequential test pattern generation using clock-control design for testability structures
10/02/2003US20030188243 Method and apparatus for delay fault testing
10/02/2003US20030188241 CMOS low leakage power-down data retention mechanism
10/02/2003US20030188240 Multi-port scan chain register apparatus and method
10/02/2003US20030188239 Compacted test plan generation for integrated circuit testing, test sequence generation, and test
10/02/2003US20030188237 Method and apparatus for testing a circuit using a die frame logic analyzer
10/02/2003US20030188236 Method of testing memory device
10/02/2003US20030188214 Method and system for efficient clock signal generation
10/02/2003US20030188204 Charging/discharging apparatus and method, power supplying apparatus and method, power supplying system and method, program storage medium, and program
10/02/2003US20030187840 Metrology diffraction signal adaptation for tool-to-tool matching
10/02/2003US20030187629 Concurrent in-system programming of programmable devices
10/02/2003US20030187620 Identification of channels and associated signal information contributing to a portion of a composite eye diagram
10/02/2003US20030187603 Tuning chart for devices under test