Patents
Patents for G01R 31 - Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere (152,264)
11/2003
11/20/2003US20030214307 Device for detecting partial discharge in power equipment using radiated electromagnetic wave
11/20/2003US20030214306 Apparatus and method of monitoring insulation of a DC network that is electrically insulated with respect to the ground potential of a device
11/20/2003US20030214303 State of charge algorithm for lead-acid battery in a hybrid electric vehicle
11/20/2003US20030214302 Synthetic making/breaking-capacity test circuit for high-voltage alternating-current circuit-breakers
11/20/2003US20030214278 Internal power supply voltage control apparatus having two internal power supply reference voltage generating circuits
11/20/2003US20030214268 Device and method for the detection of a charging voltage
11/20/2003US20030214008 Semiconductor integrated circuit with shortened pad pitch
11/20/2003US20030214005 A-C:H ISFET device, manufacturing method, and testing methods and apparatus thereof
11/20/2003US20030213954 Defective cell remedy method capable of automatically cutting capacitor fuses within the fabrication process
11/20/2003US20030213953 Integrated circuit chips and wafers including on-chip test element group circuits, and methods of fabricating and testing same
11/20/2003US20030213909 Method of inspecting pattern and inspecting instrument
11/20/2003US20030213793 Wafer chuck having thermal plate with interleaved heating and cooling elements, interchangeable top surface assemblies and hard coated layer surfaces
11/20/2003DE20308854U1 Fault simulator for protective circuits in experimental modular systems, has three keys with make and break contacts, and power protection device fixed to plastics plate
11/20/2003DE10214885C1 Verfahren und Teststruktur zur Bestimmung von Widerstandwerten an mehreren zusammengeschalteten Widerständen in einer integrierten Schaltung The method and test structure for the determination of resistance values ​​at a plurality of interconnected resistors in an integrated circuit
11/20/2003CA2524695A1 In packet-switched cellular networks
11/19/2003EP1363482A1 Printed wiring board, multilayer printed wiring board, and, method of detecting foreign matter and voids in inner layer of multilayer printed wiring board
11/19/2003EP1363323A2 Apparatus and method for determining electrical properties of a semiconductor wafer
11/19/2003EP1363133A2 Method for measuring of the state of charge of an electric accumulator battery
11/19/2003EP1363132A2 A method and device for testing of configuration memory cells in programmable logic devices (PLDS)
11/19/2003EP1362391A1 Terminal connector
11/19/2003EP1362243A1 Method and assembly for determining the output capacity of a battery
11/19/2003EP1362242A1 Test circuit for hvdc thyristor valves
11/19/2003EP1252527B1 Static charge warning device
11/19/2003EP1024855B1 Packaging and coating for bio-electrical stimulation and recording electrodes
11/19/2003EP0811989B1 A method and apparatus for testing an integrated circuit memory array
11/19/2003EP0745935B1 Analog boundary scan cell
11/19/2003CN2587103Y IC intelligent power source follower
11/19/2003CN2587100Y DC motor locked-rotor detecting device
11/19/2003CN1457433A Automatic test equipment with narrow output pulses
11/19/2003CN1457431A Low profile pneumatically actuated docking module with power fault release
11/19/2003CN1457282A Method of retrofitting probe station
11/19/2003CN1456899A Constant pulsed light xenon lamp solar cell testing method
11/19/2003CN1456898A Automatic positioning system/global positioning system receiver comprehensive testing system
11/19/2003CN1128369C In-situ generator rotor monitoring instrument
11/18/2003US6651238 Providing fault coverage of interconnect in an FPGA
11/18/2003US6651231 Clock synchronizing circuit and method of designing the same
11/18/2003US6651227 Method for generating transition delay fault test patterns
11/18/2003US6651206 Method of design for testability, test sequence generation method and semiconductor integrated circuit
11/18/2003US6651205 Test pattern conversion apparatus and conversion method
11/18/2003US6651204 Modular architecture for memory testing on event based test system
11/18/2003US6651203 On chip programmable data pattern generator for semiconductor memories
11/18/2003US6651202 Built-in self repair circuitry utilizing permanent record of defects
11/18/2003US6651201 Programmable memory built-in self-test combining microcode and finite state machine self-test
11/18/2003US6651200 Method and apparatus for adaptive clocking for boundary scan testing and device programming
11/18/2003US6651199 In-system programmable flash memory device with trigger circuit for generating limited duration program instruction
11/18/2003US6651198 System and method for testing on-chip modules and the interconnections between on-chip modules
11/18/2003US6651197 Method for determining the optimum locations for scan latches in a partial-scan IC built in self test system
11/18/2003US6651196 Semiconductor device having test mode entry circuit
11/18/2003US6651179 Delay time judging apparatus
11/18/2003US6651129 Apparatus and method for establishing a data communication interface to control and configure an electronic system with analog and digital circuits
11/18/2003US6651038 Architecture for simulation testbench control
11/18/2003US6651024 Method for automatic testing PCMCIA cards
11/18/2003US6651023 Semiconductor test apparatus, and method of testing semiconductor device
11/18/2003US6651022 Semiconductor device capable of test mode operation
11/18/2003US6651014 Apparatus for automatically measuring the resistivity of semiconductor boules by using the method of four probes
11/18/2003US6651013 Method and apparatus for determining the location of a short in an electrical wire network
11/18/2003US6650956 Wiring harness checking method
11/18/2003US6650768 Using time resolved light emission from VLSI circuit devices for navigation on complex systems
11/18/2003US6650750 Voice notification for a battery alarm in a network interface unit
11/18/2003US6650583 Test circuit device capable of identifying error in stored data at memory cell level and semiconductor integrated circuit device including the same
11/18/2003US6650582 Semiconductor memory device
11/18/2003US6650581 Semiconductor memory device, and method for testing the same
11/18/2003US6650578 Semiconductor storage device and setting method thereof
11/18/2003US6650262 AD converter evaluation apparatus
11/18/2003US6650159 Method and apparatus for precise signal interpolation
11/18/2003US6650136 Method and apparatus to enhance testability of logic coupled to IO buffers
11/18/2003US6650132 Method and apparatus for temperature control of a device during testing
11/18/2003US6650130 Integrated circuit device defect detection method and apparatus employing light emission imaging
11/18/2003US6650122 Rotor analyzer for an induction motor
11/18/2003US6650120 Apparatus and method for accessing data stored within a power source
11/18/2003US6650105 EPROM used as a voltage monitor for semiconductor burn-in
11/18/2003US6650104 Device for detecting impedance disturbance points in symmetrical data transmission lines
11/18/2003US6650103 Magnetic snapback sensor circuit and electrostatic discharge circuit using same
11/18/2003US6649932 Electrical print resolution test die
11/18/2003US6649931 Semiconductor wafer, semiconductor chip, semiconductor device and method for manufacturing semiconductor device
11/18/2003US6649430 Characteristic evaluation apparatus for insulated gate type transistors
11/18/2003US6649425 Method to reduce leakage during a semi-conductor burn-in procedure
11/18/2003US6648756 High/low number game
11/18/2003US6648662 Continuity test unit for connector
11/18/2003US6648654 Electrical connector
11/18/2003CA2312509C Open cable locating for sheathed cables
11/18/2003CA2104223C Method and an apparatus for charging a rechargeable battery
11/16/2003CA2386651A1 Method of monitoring utility lines with aircraft
11/13/2003WO2003094223A1 Method for measuring withstand voltage of semiconductor epitaxial wafer and semiconductor epitaxial wafer
11/13/2003WO2003093999A2 Inherently fail safe processing or control apparatus
11/13/2003WO2003093849A1 Multiple model systems and methods for testing electrochemical systems
11/13/2003WO2003093848A1 Method and device for use in dc parametric tests
11/13/2003WO2003093847A1 Automatic teaching method for printed circuit board inspection system
11/13/2003WO2003093846A1 Measurement device and measurement method
11/13/2003WO2003093845A2 Semiconductor test system having multitasking algorithmic pattern generator
11/13/2003WO2003093844A1 Secure scan
11/13/2003WO2003093843A1 Circuit and method for adding parametric test capability to digital boundary scan
11/13/2003WO2003093840A1 Connector for measuring electric resistance, apparatus and method for measuring electric resistance of circuit board
11/13/2003WO2003093839A1 Device for testing printed circuit boards
11/13/2003WO2003093760A1 Systems and methods for deformation measurement
11/13/2003WO2003062845A3 An in-chip monitoring system to monitor input/output of functional blocks
11/13/2003WO2003060534A3 Integrated circuit with self-testing circuit
11/13/2003WO2003034492A8 Apparatus and methods for semiconductor ic failure detection
11/13/2003WO2002071086A8 Anionic polymers composed of dicarboxylic acids and uses thereof
11/13/2003US20030212970 Systems and methods providing scan-based delay test generation