Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
05/2002
05/02/2002US20020051387 Method of operating split gate-typed non-volatile memory cell and semiconductor memory device having the cells
05/02/2002US20020051378 Semiconductor memory device and method of manufacturing the same
05/02/2002US20020051258 Composite sensor device and method of producing the same
05/02/2002US20020051110 Control signal unit for a liquid crystal display and a method for fabricating the same
05/02/2002US20020051101 Liquid crystal display
05/02/2002US20020050967 Liquid crystal display device
05/02/2002US20020050836 Reduced terminal testing system
05/02/2002US20020050795 Active matrix organic el display device and method of forming the same
05/02/2002US20020050650 Semiconductor device and method for making the same
05/02/2002US20020050644 Electrode structure and method for fabricating the same
05/02/2002US20020050634 Semiconductor device with stacked memory and logic substrates and method for fabricating the same
05/02/2002US20020050631 Semiconductor device and method for fabricating the same
05/02/2002US20020050624 Mechanical resistance of a single-crystal silicon wafer
05/02/2002US20020050621 Method and device to reduce gate-induced drain leakage (GIDL) current in thin gate oxide MOSFETs
05/02/2002US20020050619 MOS transistor having an offset region
05/02/2002US20020050618 Semiconductor device and manufacturing method thereof
05/02/2002US20020050614 Body-tied-to-source partially depleted SOI MOSFET
05/02/2002US20020050613 High-voltage transistor with multi-layer conduction region
05/02/2002US20020050612 Semiconductor device including a nonvolatile memory-cell array, and method of manufacturing the same
05/02/2002US20020050610 Non-volatile memory cell
05/02/2002US20020050609 Non-volatile memory device and fabrication method thereof
05/02/2002US20020050608 Novel gate dielectric
05/02/2002US20020050607 Nonvolatile semiconductor memory
05/02/2002US20020050604 Compound semiconductor device
05/02/2002US20020050603 Semiconductor device
05/02/2002US20020050602 Semiconductor device having diode for input protection circuit of MOS structure device
05/02/2002US20020050599 Array substrate for liquid crystal display device and method for manufacturing the same
05/02/2002US20020050172 Semiconductor pressure sensor having signal processor circuit
05/02/2002US20020050052 Method for nanufacturing sensor apparatus
05/02/2002EP1202352A2 High breakdown voltage semiconductor device
05/02/2002EP1202335A2 Method of fabricating semiconductor side wall fin
05/02/2002EP1202242A2 Light emitting device and method of driving the same
05/02/2002EP1201603A2 Method to remove metal and silicon oxide during gas-phase sacrificial oxide etch
05/02/2002EP1200994A2 Punch-through diode and method of manufacturing the same
05/02/2002EP1200993A1 Double triggering mechanism for achieving faster turn-on
05/02/2002EP0879481B1 Field effect controlled semiconductor component
05/02/2002EP0813752B1 Capacitor structure for an integrated circuit
05/02/2002EP0739542B1 Input/output transistors with optimized esd protection
05/02/2002EP0683924B1 Method for fabricating a p-type graded composition ohmic contact for p-type II-VI semiconductors
05/02/2002DE10150432A1 Diffraction grating substrate for a liquid crystal display unit incorporating thin film transistors
05/02/2002DE10051973A1 Micromechanical component has seismic mass sprung-mounted by double U spring to be deflectable by external acceleration, stop(s) protrusion for limiting deflection of double U spring
05/01/2002CN1347581A Semiconductor structures having strain compensated layer and method of fabrication
05/01/2002CN1347571A Electrostatically controlled tunneling transistor
05/01/2002CN1347570A Field effect transistor of SiC for high temp. application, use of such transistor and method for production thereof
05/01/2002CN1347568A Improved ESD diode structure
05/01/2002CN1347567A Bidirectional ESD diode structure
05/01/2002CN1347267A Cathode contact structure of organic electroluminescent device
05/01/2002CN1347159A Semiconductor device and method for mfg. same
05/01/2002CN1347158A Semiconductor device and method for mfg. same
05/01/2002CN1347156A Semiconductor memory
05/01/2002CN1347155A Si-Ge device
05/01/2002CN1347146A Semiconductor device with silicon structure on insulator, and method for mfg. same
05/01/2002CN1084068C Switching mechanism for gas insulated switch gear
05/01/2002CN1084054C Field effect transistor in dynamic random access memory device and memory unit structure thereof
05/01/2002CN1084053C Device with static electricity discharge protection
05/01/2002CN1084052C Semiconductor IC device having n-type and p-type semiconductor conductive regions formed in contact with each other
05/01/2002CN1083980C Semiconductor-type accelerometer and method for evaluating properties of sensor element formed
04/2002
04/30/2002US6381178 Non-volatile semiconductor memory device and method of rewriting data stored in non-volatile semiconductor memory device
04/30/2002US6381161 Low-inductance circuit arrangement
04/30/2002US6380636 Nonvolatile semiconductor memory device having an array structure suitable to high-density integrationization
04/30/2002US6380612 Thin film formed by inductively coupled plasma
04/30/2002US6380602 Semiconductor device
04/30/2002US6380601 Multilayer semiconductor structure with phosphide-passivated germanium substrate
04/30/2002US6380600 Micro-electromechanical arrangement
04/30/2002US6380590 SOI chip having multiple threshold voltage MOSFETs by using multiple channel materials and method of fabricating same
04/30/2002US6380586 Trench-type insulated gate bipolar transistor
04/30/2002US6380585 Nonvolatile semiconductor device capable of increased electron injection efficiency
04/30/2002US6380584 Semiconductor memory device with single and double sidewall spacers
04/30/2002US6380583 Method to increase coupling ratio of source to floating gate in split-gate flash
04/30/2002US6380582 Autoaligned etching process for realizing word lines in memory devices integrated semiconductor substrates
04/30/2002US6380578 High-speed stacked capacitor in SOI structure
04/30/2002US6380573 Substrate with channel; ferroelectric dielectric; barrier electrode
04/30/2002US6380569 High power unipolar FET switch
04/30/2002US6380566 Semiconductor device having FET structure with high breakdown voltage
04/30/2002US6380565 Bidirectional switch with increased switching breakdown voltage
04/30/2002US6380561 Semiconductor device and process for producing the same
04/30/2002US6380560 Semiconductor device forming a pixel matrix circuit
04/30/2002US6380559 Thin film transistor array substrate for a liquid crystal display
04/30/2002US6380558 Semiconductor device and method of fabricating the same
04/30/2002US6380553 Multilayer matrix-addressable logic device with a plurality of individually matrix-addressable and stacked thin films of an active material
04/30/2002US6380552 Low turn-on voltage InP Schottky device and method
04/30/2002US6380104 Method for forming composite gate dielectric layer equivalent to silicon oxide gate dielectric layer
04/30/2002US6380102 Method for fabricating gate oxide film of semiconductor device
04/30/2002US6380098 Composition for a wiring, a wiring using the composition, manufacturing method thereof, a display using the wiring and a manufacturing method thereof
04/30/2002US6380089 Method of manufacturing semiconductor device
04/30/2002US6380088 Method to form a recessed source drain on a trench side wall with a replacement gate technique
04/30/2002US6380056 Lightly nitridation surface for preparing thin-gate oxides
04/30/2002US6380055 Dopant diffusion-retarding barrier region formed within polysilicon gate layer
04/30/2002US6380053 Method for producing a semiconductor device with an accurately controlled impurity concentration profile in the extension regions
04/30/2002US6380046 Method of manufacturing a semiconductor device
04/30/2002US6380043 Low temperature process to form elevated drain and source of a field effect transistor having high-K gate dielectric
04/30/2002US6380041 Semiconductor with laterally non-uniform channel doping profile and manufacturing method therefor
04/30/2002US6380038 Transistor with electrically induced source/drain extensions
04/30/2002US6380036 Semiconductor device and method of manufacturing the same
04/30/2002US6380035 Poly tip formation and self-align source process for split-gate flash cell
04/30/2002US6380034 Process for manufacturing memory cells with dimensional control of the floating gate regions
04/30/2002US6380032 Flash memory device and method of making same
04/30/2002US6380030 Implant method for forming Si3N4 spacer
04/30/2002US6380029 Method of forming ono stacked films and DCS tungsten silicide gate to improve polycide gate performance for flash memory devices
04/30/2002US6380022 Method for creating a useful biopolar junction transistor from a parasitic bipolar junction transistor on a MOSFET