Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
03/2009
03/03/2009US7498201 Method of forming a multi-die semiconductor package
03/03/2009US7498200 Electronic-parts-packaging structure in which a semiconductor chip is mounted on a wiring substrate and buried in an insulation film
03/03/2009US7498196 Structure and manufacturing method of chip scale package
03/03/2009US7498195 Multi-chip semiconductor connector assembly method
03/03/2009US7498194 Semiconductor arrangement
03/03/2009US7498193 Package with barrier wall and method for manufacturing the same
03/03/2009US7498085 Encapsulating light emitting semiconductor
03/03/2009US7498074 Metal photoetching product and production method thereof
03/03/2009US7497963 Etching method
03/03/2009US7497248 Twin fin arrayed cooling device
03/03/2009US7497005 Method for forming an inductor
02/2009
02/26/2009WO2009026509A2 Semiconductor package having buss-less substrate
02/26/2009WO2009026224A2 High input/output, low profile package-on-package semiconductor system
02/26/2009WO2009026171A2 Stacked die vertical interconnect formed by transfer of interconnect material
02/26/2009WO2009026030A1 Nickel tin bonding system with barrier layer for semiconductor wafers and devices
02/26/2009WO2009025961A2 Semiconductor component and method of manufacture
02/26/2009WO2009025706A1 Mos structures that exhibit lower contact resistance and methods for fabricating the same
02/26/2009WO2009025471A2 Apparatus for attaching adhesion film for manufacturing semiconductor packages
02/26/2009WO2009025402A1 Tray for epoxy molding compound powder and apparatus for providing epoxy molding compound powder having the tray
02/26/2009WO2009025320A1 Electronic parts package, base for electronic parts package, and junction structure of electronic parts package and circuit substrate
02/26/2009WO2009025109A1 Wiring structure, integrated circuit having the wiring structure, solid image pickup element having the wiring structure, and imaging device having the solid image pickup element
02/26/2009WO2009024432A1 Module construction and connection technology by means of metal scrap web or bent stamping parts bent from a plane
02/26/2009WO2009024291A1 Spectrally tunable laser module
02/26/2009WO2008012684A8 A method of fabricating a nanostructure on a pre-etched substrate.
02/26/2009WO2007104004A3 Method and apparatus for dissipating heat from an integrated circuit
02/26/2009WO2005112103A3 Microfabricated miniature grids
02/26/2009WO2005057617A3 Bond wireless package
02/26/2009US20090053887 Wirebond pad for semiconductor chip or wafer
02/26/2009US20090053856 Semiconductor device comprising light-emitting element and light-receiving element, and manufacturing method therefor
02/26/2009US20090053498 Adhesive film for semiconductor use, metal sheet laminated with adhesive film, wiring circuit laminated with adhesive film, and semiconductor device using same, and method for producing semiconductor device
02/26/2009US20090053459 Conductive connecting pin and package substrate
02/26/2009US20090052221 Semiconductor device including antifuse element
02/26/2009US20090051286 Electronics device, semiconductor device, and method for manufacturing the same
02/26/2009US20090051053 Epoxy resin composition and semiconductor apparatus
02/26/2009US20090051052 Semiconductor device
02/26/2009US20090051051 Semiconductor device and method for manufacturing the same
02/26/2009US20090051050 corner i/o pad density
02/26/2009US20090051049 Semiconductor device, substrate and semiconductor device manufacturing method
02/26/2009US20090051048 Package structure and manufacturing method thereof
02/26/2009US20090051047 Semiconductor apparatus and method of manufacturing the same
02/26/2009US20090051046 Semiconductor device and manufacturing method for the same
02/26/2009US20090051045 Semiconductor package apparatus
02/26/2009US20090051044 Wafer-level packaged structure and method for making the same
02/26/2009US20090051043 Die stacking in multi-die stacks using die support mechanisms
02/26/2009US20090051042 Semiconductor device and method for manufacturing the same
02/26/2009US20090051041 Multilayer wiring substrate and method for manufacturing the same, and substrate for use in ic inspection device and method for manufacturing the same
02/26/2009US20090051040 Power layout of integrated circuits and designing method thereof
02/26/2009US20090051039 Through-substrate via for semiconductor device
02/26/2009US20090051038 Semiconductor device including semiconductor constituent and manufacturing method thereof
02/26/2009US20090051037 Semiconductor device and method of manufacture thereof
02/26/2009US20090051036 Semiconductor Package Having Buss-Less Substrate
02/26/2009US20090051035 Semiconductor integrated circuit
02/26/2009US20090051034 Semiconductor device and method for the same
02/26/2009US20090051033 Reliability improvement of metal-interconnect structure by capping spacers
02/26/2009US20090051032 Patterned nanoscopic articles and methods of making the same
02/26/2009US20090051031 Package structure and manufacturing method thereof
02/26/2009US20090051030 Semiconductor package with pad parts electrically connected to bonding pads through re-distribution layers
02/26/2009US20090051029 Flip-chip type semiconductor device
02/26/2009US20090051028 Electronic device and electronic apparatus
02/26/2009US20090051027 Method of Manufacture and Identification of Semiconductor Chip Marked For Identification with Internal Marking Indicia and Protection Thereof by Non-black Layer and Device Produced Thereby
02/26/2009US20090051026 Process for forming metal film and release layer on polymer
02/26/2009US20090051025 Fan out type wafer level package structure and method of the same
02/26/2009US20090051024 Semiconductor package structure
02/26/2009US20090051023 Stack package and method of fabricating the same
02/26/2009US20090051022 Lead frame structure
02/26/2009US20090051021 Semiconductor chip stack-type package and method of fabricating the same
02/26/2009US20090051020 Method of manufacturing semiconductor device, and semiconductor device
02/26/2009US20090051019 Multi-chip module package
02/26/2009US20090051018 Semiconductor component and method of manufacture
02/26/2009US20090051017 Lead Frame with Non-Conductive Connective Bar
02/26/2009US20090051016 Electronic component with buffer layer
02/26/2009US20090051015 Semiconductor device and printed circuit board
02/26/2009US20090051013 Semiconductor wafer for semiconductor components and production method
02/26/2009US20090051012 Through-hole interconnection structure for semiconductor wafer
02/26/2009US20090051010 IC package sacrificial structures for crack propagation confinement
02/26/2009US20090051007 Semiconductor device and method for fabricating the same
02/26/2009US20090051004 Surface Mount Components Joined Between a Package Substrate and a Printed Circuit Board
02/26/2009US20090050996 Electronic device wafer level scale packages and fabrication methods thereof
02/26/2009US20090050995 Electronic device wafer level scale packges and fabrication methods thereof
02/26/2009US20090050994 Method of manufacturing semiconductor device with electrode for external connection and semiconductor device obtained by means of said method
02/26/2009US20090050992 Amorphous soft magnetic shielding and keeper for mram devices
02/26/2009US20090050972 Strained Semiconductor Device and Method of Making Same
02/26/2009US20090050971 High voltage durability transistor and method for fabricating same
02/26/2009US20090050970 Diode-Based ESD Concept for DEMOS Protection
02/26/2009US20090050968 Semiconductor device
02/26/2009US20090050902 Semiconductor device having silicon carbide and conductive pathway interface
02/26/2009US20090050887 Chip on film (cof) package having test pad for testing electrical function of chip and method for manufacturing same
02/26/2009US20090050886 Test device, SRAM test device, semiconductor integrated circuit device and methods of fabricating the same
02/26/2009US20090050885 Semiconductor wafers and methods of fabricating semiconductor devices
02/26/2009US20090050854 Organic Species that Facilitate Charge Transfer to or from Nanostructures
02/26/2009US20090050308 Base Structure for a Heat Sink
02/26/2009DE202008016722U1 Vorrichtung mit einem Substrat und zumindest einem Bondpad Device comprising a substrate and at least one bonding pad
02/26/2009DE202008012628U1 Wärmeleitvorrichtung Heat conducting
02/26/2009DE102008039068A1 Halbleitervorrichtung Semiconductor device
02/26/2009DE102008038421A1 Elektrisches Gerät, Verfahren und Verwendung Electrical equipment, process and
02/26/2009DE102008037835A1 Elektronische Komponente mit Pufferschicht Electronic component with buffer layer
02/26/2009DE102008036112A1 Leistungshalbleitermodul The power semiconductor module
02/26/2009DE102008035536A1 ESD-Bauelement (Electro Static Discharge - Elektrostatische Entladung) und Verfahren zum Herstellen eines ESD-Bauelents ESD component (Electro Static Discharge - Electrostatic discharge) and method of manufacturing an ESD Bauelents
02/26/2009DE102008034574A1 Integrierte Schaltung mit einem Halbleitersubstrat mit einer Barrierenschicht An integrated circuit comprising a semiconductor substrate with a barrier layer
02/26/2009DE102008034387A1 Wafer-Ebenen-Packungsstruktur mit Aufbau-Schichten Wafer-level package structure with build-layers