Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/1999
03/10/1999CN1210368A Method for automatically welding package of ball array integrated circuit by coil belt
03/10/1999CN1210367A Method for automatically welding package of ball array integrated circuit by coil belt
03/10/1999CN1210366A DRAM cell capaciator and method for manufacturing the same
03/10/1999CN1210365A Method for manufacturing semiconductor device capable or improving planarization
03/10/1999CN1210364A Process of removing CMP scratches by BPSG reflow and integrated circuit chip formed thereby
03/10/1999CN1210363A Method for automatically welding package of ball array integrated circuit by coil belt
03/10/1999CN1210362A Method of manufacturing semiconductor device
03/10/1999CN1210361A Semiconductor device and method of manufacturing the same
03/10/1999CN1210339A Dynamic random access memory unit device and manufacture thereof
03/10/1999CN1210338A Conductor integrated circuit device with improved characters at low voltage ranges
03/10/1999CN1210126A Energy beam curable hydrophilic pressure sensitive adhesive composition and use thereof
03/10/1999CN1042473C Method for forming contact plug of semiconductor or device
03/09/1999US5881208 Heater and temperature sensor array for rapid thermal processing thermal core
03/09/1999US5881193 Low profile optical subassembly
03/09/1999US5881165 Process for the positioning of a mask relative to a workpiece and device for executing the process
03/09/1999US5881155 Security device for a semiconductor chip
03/09/1999US5881125 Attenuated phase-shifted reticle using sub-resolution pattern
03/09/1999US5881090 Quartz used in semiconductor manufacturing device, apparatus for manufacturing the quartz, and method for manufacturing the same
03/09/1999US5881006 Semiconductor memory device
03/09/1999US5880994 Non-volatile semiconductor memory device having verify function
03/09/1999US5880991 Structure for low cost mixed memory integration, new NVRAM structure, and process for forming the mixed memory and NVRAM structure
03/09/1999US5880990 Dual port memory apparatus operating a low voltage to maintain low operating current during charging and discharging
03/09/1999US5880989 Sensing methodology for a 1T/1C ferroelectric memory
03/09/1999US5880977 Mesh generation device and its method for generating meshes having a boundary protective layer
03/09/1999US5880969 Method and apparatus for deciding a wiring route and for detecting a critical cut
03/09/1999US5880924 Electrostatic chuck capable of rapidly dechucking a substrate
03/09/1999US5880923 Method and apparatus for improved retention of a semiconductor wafer within a semiconductor wafer processing system
03/09/1999US5880922 Multilayered electrostatic chuck and method of manufacture thereof
03/09/1999US5880917 Well resistor for ESD protection of CMOS circuits
03/09/1999US5880817 Projection-exposure apparatus and method exhibiting reduced solarization and radiation compaction
03/09/1999US5880794 Active matrix liquid crystal display and method with two anodizations
03/09/1999US5880774 Non-invasive inspection platen
03/09/1999US5880621 Analog switch circuit
03/09/1999US5880602 Input and output buffer circuit
03/09/1999US5880590 Apparatus and method for burn-in and testing of devices with solder bumps or preforms
03/09/1999US5880531 Lead on chip semiconductor memory device with multiple bit configuration
03/09/1999US5880530 Multiregion solder interconnection structure
03/09/1999US5880527 Contact structure for semiconductor device
03/09/1999US5880526 Barrier metal layer
03/09/1999US5880522 Stamped lead frame with adhesive layer for fixing to semiconductor device
03/09/1999US5880521 Super-conductive wiring and semiconductor device using the same
03/09/1999US5880518 Waterproof silicon oxide layer containing excess silicon disposed at an uppermost layer of the dielectric film
03/09/1999US5880516 Semiconductor device utilizing a pedestal collector region and method of manufacturing the same
03/09/1999US5880514 Protection circuit for semiconductor device
03/09/1999US5880513 Asymmetric snubber resistor
03/09/1999US5880508 MOSFET with a high permitivity gate dielectric
03/09/1999US5880507 Semiconductor device with improved pn junction breakdown voltage
03/09/1999US5880505 Solid solution with high heat resistance and low sheet resistance
03/09/1999US5880503 Semiconductor integrated circuit device having static memory cell with CMOS structure
03/09/1999US5880502 Low and high voltage CMOS devices and process for fabricating same
03/09/1999US5880500 Semiconductor device and process and apparatus of fabricating the same
03/09/1999US5880499 Memory cell of a nonvolatile semiconductor device
03/09/1999US5880496 Semiconductor having self-aligned polysilicon electrode layer
03/09/1999US5880493 Semiconductor integrated circuit devices adapted for automatic design and method of arranging such devices
03/09/1999US5880487 Semiconductor device and method for manufacturing the same
03/09/1999US5880486 Light-emitting gallium nitride-based compound semiconductor device
03/09/1999US5880484 Lateral resonant tunneling transistor having two non-symmetric quantum dots
03/09/1999US5880483 Active layer comprising groups 3-5 materials; field effect transistors
03/09/1999US5880479 Wafer aligner apparatus using different diameter rollers
03/09/1999US5880437 Automatic control system and method using same
03/09/1999US5880355 Apparatus for measuring contamination particles during the manufacture of semiconductor devices
03/09/1999US5880041 Method for forming a dielectric layer using high pressure
03/09/1999US5880040 Gate dielectric based on oxynitride grown in N2 O and annealed in NO
03/09/1999US5880039 Method for forming interlayer insulating film of a semiconductor device
03/09/1999US5880038 Forming a resist mask on an upper portion of an aluminum gate electrode, anodizing to form an oxide on unmasked regions; forming silicon oxide film, hydrofluoric acid etching to form contact holes to semiconductor and wire simultaneously
03/09/1999US5880037 Oxide etch process using a mixture of a fluorine-substituted hydrocarbon and acetylene that provides high selectivity to nitride and is suitable for use on surfaces of uneven topography
03/09/1999US5880036 Method for enhancing oxide to nitride selectivity through the use of independent heat control
03/09/1999US5880035 Dry etching method
03/09/1999US5880034 Reduction of semiconductor structure damage during reactive ion etching
03/09/1999US5880033 Method for etching metal silicide with high selectivity to polysilicon
03/09/1999US5880032 Etching oxide film by introducing steam or alcohol into processing vessel, removing steam or alcohol in the form of a gas, introducing hydrogen fluoride
03/09/1999US5880031 Method for vapor phase wafer cleaning
03/09/1999US5880030 Unlanded via structure and method for making same
03/09/1999US5880029 Exposing the surface of gallium arsenide semiconductor material to deep ultraviolet radiation in presence of oxygen to form a layer of oxide, forming a silicon oxide or nitride passivation layer on oxide layer
03/09/1999US5880027 Process for fabricating semiconductor wafer
03/09/1999US5880026 Method for air gap formation by plasma treatment of aluminum interconnects
03/09/1999US5880024 Semiconductor device having wiring self-aligned with shield structure and process of fabrication thereof
03/09/1999US5880023 Process for formation of wiring layer in semiconductor device
03/09/1999US5880022 Self-aligned contact window
03/09/1999US5880021 Method of making multilevel interconnections of electronic parts
03/09/1999US5880020 Forming a contact hole which will connect to a transistor and a contact hole for local connection which will connect locations simultaneously when filled with conductive plugs, insulating, exposing surface of plug; simplification
03/09/1999US5880019 Insitu contact descum for self-aligned contact process
03/09/1999US5880018 Method for manufacturing a low dielectric constant inter-level integrated circuit structure
03/09/1999US5880017 Method of bumping substrates by contained paste deposition
03/09/1999US5880015 Method of producing stepped wall interconnects and gates
03/09/1999US5880014 Plural wells structure in a semiconductor device and method for forming the same
03/09/1999US5880013 Method for reducing cross-contamination in ion implantation
03/09/1999US5880012 Method for making semiconductor nanometer-scale wire using an atomic force microscope
03/09/1999US5880011 Method and apparatus for manufacturing pre-terminated chips
03/09/1999US5880010 Ultrathin electronics
03/09/1999US5880009 Method for forming oxides on buried N+ -type regions
03/09/1999US5880008 Selectively etching a portion of the semiconductor substrate with the first silicon nitride film and sidewall spacer used as a mask; forming thin field oxide in a self-aligned manner relative to polysilicon layer; floating gate memory devices
03/09/1999US5880007 Planarization of a non-conformal device layer in semiconductor fabrication
03/09/1999US5880006 Method for fabrication of a semiconductor device
03/09/1999US5880005 Method for forming a tapered profile insulator shape
03/09/1999US5880004 Trench isolation process
03/09/1999US5880003 A surface polishing treatment by coating an anti-polishing protruding film, avoiding occurrence of overpolishing
03/09/1999US5880002 Method for making isolated vertical PNP transistor in a digital BiCMOS process
03/09/1999US5880001 Method for forming epitaxial pinched resistor having reduced conductive cross sectional area
03/09/1999US5880000 Method for fabricating an NPN transistor of minimum surface
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