Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/1999
03/17/1999CN1211082A Semiconductor device and manufacturing process therefor
03/17/1999CN1211079A Nonvolatile semiconductor memory device
03/17/1999CN1211078A Nonvolatile semiconductor memory device
03/17/1999CN1211077A Storage unit and anonvolatile semiconductor storage having said storage unit
03/17/1999CN1211076A DRAM unit device having dynamic automatic amplifying and storage unit and its producing method
03/17/1999CN1211075A Protection circuit for discharging large amount of satic charge current through field effect transistors different in break-down voltage
03/17/1999CN1211073A Semiconductor device
03/17/1999CN1211071A Semiconductor device and method of manufacturing the same
03/17/1999CN1211070A Semiconductor device fabrication method
03/17/1999CN1211068A Semiconductor devices and processes for making them
03/17/1999CN1211067A Method for producing structure with large ratio of height and width
03/17/1999CN1211066A Method of forming contact plugs in semiconductor device
03/17/1999CN1211065A Method for protecting device components from chemical mechanical polish induced defects
03/17/1999CN1211064A Polysilicon structure discharge technology for surface treatment
03/17/1999CN1210902A Nozzle-injector for arc plasma deposition apparatus
03/17/1999CN1210901A Protective coating by high rate arc plasma deposition
03/17/1999CN1210899A Silicon dioxide deposition by plasma activated evaporation process
03/17/1999CN1210886A Washing liquid
03/17/1999CN1042578C Method for making semiconductor device of silicon-on-insulator structure
03/17/1999CN1042577C Method of treating a semi-conductor wafer
03/17/1999CN1042550C Activated polishing composition and its preparing method
03/17/1999CA2245530A1 Solventless laminating adhesive with barrier properties
03/16/1999US5884235 Non-contact, zero-flux temperature sensor
03/16/1999US5884009 Substrate treatment system
03/16/1999US5883932 Substrate holding device and exposing apparatus using the same
03/16/1999US5883835 Control method for non-volatile memory
03/16/1999US5883832 Electrically erasable and programmable non-volatile storage location
03/16/1999US5883828 Low imprint ferroelectric material for long retention memory and method of making the same
03/16/1999US5883814 System-on-chip layout compilation
03/16/1999US5883813 Automatic generation of phase shift masks using net coloring
03/16/1999US5883805 Manufacturing control system capable of changing a manufacturing line easily and its data modifying method
03/16/1999US5883781 Highly-integrated thin film capacitor with high dielectric constant layer
03/16/1999US5883778 Electrostatic chuck with fluid flow regulator
03/16/1999US5883704 Projection exposure apparatus wherein focusing of the apparatus is changed by controlling the temperature of a lens element of the projection optical system
03/16/1999US5883702 Stage driving exposure apparatus wherein the number of driving devices exceeds the degrees of freedom of the stage
03/16/1999US5883700 Method for projection exposure to light
03/16/1999US5883682 Structure of a liquid crystal display and method of manufacturing the same
03/16/1999US5883566 Noise-isolated buried resistor
03/16/1999US5883547 Charging of a bootstrap capacitance through an LDMOS
03/16/1999US5883544 Integrated circuit actively biasing the threshold voltage of transistors and related methods
03/16/1999US5883540 Electrostatic protection circuit of an input/output circuit of a semiconductor device
03/16/1999US5883522 Apparatus and method for retaining a semiconductor wafer during testing
03/16/1999US5883521 Glitch noise producing semiconductor device for testing semiconductor components
03/16/1999US5883518 System and method for measuring the doping level and doping profile of a region in a semiconductor substrate
03/16/1999US5883440 Outline forming method for semiconductor device and semiconductor manufacturing device used in this method
03/16/1999US5883438 Interconnection structure for attaching a semiconductor to substrate
03/16/1999US5883437 Method and apparatus for inspection and correction of wiring of electronic circuit and for manufacture thereof
03/16/1999US5883436 Contact and via fabrication technologies
03/16/1999US5883434 Semiconductor device having capped contact plug capable of suppressing increase of resistance
03/16/1999US5883433 Semiconductor device having a critical path wiring
03/16/1999US5883432 Connection structure between electrode pad on semiconductor device and printed pattern on printed circuit board
03/16/1999US5883430 Thermally enhanced flip chip package
03/16/1999US5883427 Semiconductor device power supply wiring structure
03/16/1999US5883425 Circuit device
03/16/1999US5883422 Reduced parasitic capacitance semiconductor devices
03/16/1999US5883418 Layer is formed on a gate electrode and source/drain regions, gate electrode layer is not damaged even if a contact hole is formed in a planarized insulating layer
03/16/1999US5883417 Poly-load resistor for SRAM cell
03/16/1999US5883415 CMOS semiconductor device with improved layout of transistors near LCD drive terminals
03/16/1999US5883412 Low gate resistance high-speed MOS-technology integrated structure
03/16/1999US5883411 Vertical insulated gate FET
03/16/1999US5883409 EEPROM with split gate source side injection
03/16/1999US5883408 Semiconductor memory device and method for making the same
03/16/1999US5883407 Semiconductor device
03/16/1999US5883405 MOS transistor read-only memory device
03/16/1999US5883401 Monolithic semiconductor switch and supply circuit component
03/16/1999US5883399 Thin film transistor having double channels and its manufacturing method
03/16/1999US5883398 Device having a switch comprising a chromium layer and method for depositing chromium layers by sputtering
03/16/1999US5883397 Organic memory element or an organic operational element of small size with high density and high speed operation, based on inter molecular electron transfer for doping carriers controllable with light irradiation or voltage application and
03/16/1999US5883396 High-frequency wireless communication system on a single ultrathin silicon on sapphire chip
03/16/1999US5883391 Ion implantation apparatus and a method of monitoring high energy neutral contamination in an ion implantation process
03/16/1999US5883219 Comprising substrate, metallic circuit lines positioned on substrate, and porous dielectric material positioned on the circuit lines; the dielectric material comprises the reaction product of an organic polysilica and polyamic ester
03/16/1999US5883060 Hydrogen fluoride, hydrogen peroxide, alcohol
03/16/1999US5883017 Compartmentalized substrate processing chamber
03/16/1999US5883016 Apparatus and method for hydrogenating polysilicon thin film transistors by plasma immersion ion implantation
03/16/1999US5883015 Method for using oxygen plasma treatment on a dielectric layer
03/16/1999US5883014 To eliminate out-gassing from the via sidewalls of an organic sog layer and produce a semiconductor product having a better functional performance.
03/16/1999US5883013 Silicone resin film for protecting a semiconductor substrate on the substrate and then removing the film without damaging
03/16/1999US5883012 Method of etching a trench into a semiconductor substrate
03/16/1999US5883011 Method of removing an inorganic antireflective coating from a semiconductor substrate
03/16/1999US5883010 Method for protecting nonsilicided surfaces from silicide formation using spacer oxide mask
03/16/1999US5883009 Method of fabricating integrated semiconductor devices comprising a chemoresistive gas microsensor
03/16/1999US5883007 Methods and apparatuses for improving photoresist selectivity and reducing etch rate loading
03/16/1999US5883006 Method for making a semiconductor device using a flowable oxide film
03/16/1999US5883005 Surface damage and undercutting are minimized.
03/16/1999US5883004 Method of planarization using interlayer dielectric
03/16/1999US5883003 Method for producing a semiconductor device comprising a refractory metal silicide layer
03/16/1999US5883002 Method of forming contact profile by improving TEOS/BPSG selectivity for manufacturing a semiconductor device
03/16/1999US5883001 Adapted for uv erase eproms.
03/16/1999US5883000 Circuit device interconnection by direct writing of patterns therein
03/16/1999US5882999 Process for metallization of an insulation layer
03/16/1999US5882998 Low power programmable fuse structures and methods for making the same
03/16/1999US5882997 Adjusting the thickness of the amorphous silicon pad and varying the diameter of the underlying conductive via
03/16/1999US5882996 Method of self-aligned dual damascene patterning using developer soluble arc interstitial layer
03/16/1999US5882995 Method of forming ohmic electrodes on semiconductor wafer
03/16/1999US5882994 Nonvolatile semiconductor memory, and method of manufacturing the same
03/16/1999US5882993 Integrated circuit with differing gate oxide thickness and process for making same
03/16/1999US5882992 Method for fabricating Tungsten local interconnections in high density CMOS circuits
03/16/1999US5882991 Approaches for shallow junction formation
03/16/1999US5882990 Phosphorous ions are diffused into the backside surface of a silicon substrate
03/16/1999US5882989 Heating the wafer in a manner to create a temperature gradient across the thickness of the wafer for a period of time.