Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/1999
07/14/1999CN1223012A Fine pitch bonding tool for constrained bonding
07/14/1999CN1223011A Wedge device for linear force amplification in press
07/14/1999CN1223010A Method and apparatus for reducing warpage in semiconductor packages
07/14/1999CN1223009A Method of growing nitride semiconductors, nitride semiconductor substrate and nitride semiconductor device
07/14/1999CN1222976A Reusable die carrier for burn-in and burn-in process
07/14/1999CN1222825A Integrated manufacturing packaging process
07/14/1999CN1222768A 半导体器件 Semiconductor devices
07/14/1999CN1222767A Memory cell device and its manufacture
07/14/1999CN1222766A Semiconductor device and method of manufacturing the same
07/14/1999CN1222765A Capacitor of semiconductor device and method for forming the same
07/14/1999CN1222763A Semiconductor device equipped with antifuse elements and method for manufacturing FPGA
07/14/1999CN1222760A Reduced pad erosion
07/14/1999CN1222759A Method of manufacturing semiconductor device
07/14/1999CN1222758A Semiconductor device assembly method and semiconductor device produced by the method
07/14/1999CN1222757A Porous region removing method and semiconductor substrate manufacturing method
07/14/1999CN1222756A Semiconductor device and its manufacturing method
07/14/1999CN1222755A Improved process for forming storage electrode
07/14/1999CN1222754A Method and apparatus for performing chemical vapor deposition on silicide films
07/14/1999CN1222753A Method for forming self aligned contact in semiconductor device
07/14/1999CN1222752A Semiconductor device and method for its preparation
07/14/1999CN1222742A Electronic lead elements and production method thereof
07/14/1999CN1222739A Memory array with reduced charging current
07/14/1999CN1222686A Flexible printed board
07/14/1999CN1222429A Wafer carrier head with inflatable bladder and attack angle control for polishing
07/13/1999US5924058 Permanently mounted reference sample for a substrate measurement tool
07/13/1999US5924012 From organometallic compounds
07/13/1999US5924011 Silicide process for mixed mode product
07/13/1999US5924010 Method for simultaneously fabricating salicide and self-aligned barrier
07/13/1999US5924009 Using titanium tetrachloride
07/13/1999US5924008 Integrated circuit having local interconnect for reducing signal cross coupled noise
07/13/1999US5924007 Method for improving the planarization of inter-poly dielectric
07/13/1999US5924006 Trench surrounded metal pattern
07/13/1999US5924005 Process for forming a semiconductor device
07/13/1999US5924004 Manufacturing method for forming metal plugs
07/13/1999US5924003 Method of manufacturing ball grid arrays for improved testability
07/13/1999US5924001 Prevention voids at interface at polycrystalline silicone and silicide
07/13/1999US5924000 Method for forming residue free patterned polysilicon layer containing integrated circuit structures
07/13/1999US5923999 Method of controlling dopant diffusion and metal contamination in thin polycide gate conductor of mosfet device
07/13/1999US5923998 Enlarged align tolerance in buried contact process using sidewall spacer
07/13/1999US5923997 Doping an amorphous silicon film; crystallizing by heating
07/13/1999US5923995 Methods and apparatuses for singulation of microelectromechanical systems
07/13/1999US5923994 Selective oxidation process
07/13/1999US5923993 Method for fabricating dishing free shallow isolation trenches
07/13/1999US5923992 Integrated circuit formed with shallow isolation structures having nitride placed on the trench dielectric
07/13/1999US5923991 Methods to prevent divot formation in shallow trench isolation areas
07/13/1999US5923990 Process for positioning a mask relative to a workpiece
07/13/1999US5923989 Method of fabricating rugged capacitor of high density DRAMs
07/13/1999US5923988 Two step thermal treatment procedure applied to polycide structures deposited using dichlorosilane as a reactant
07/13/1999US5923987 Method for forming MOS devices with retrograde pocket regions and counter dopant regions at the substrate surface
07/13/1999US5923986 Method of forming a wide upper top spacer to prevent salicide bridge
07/13/1999US5923985 MOS field effect transistor and its manufacturing method
07/13/1999US5923984 Method of making enhancement-mode and depletion-mode IGFETS with different gate materials
07/13/1999US5923983 Integrated circuit gate conductor having a gate dielectric which is substantially resistant to hot carrier effects
07/13/1999US5923982 Method of making asymmetrical transistor with lightly and heavily doped drain regions and ultra-heavily doped source region using two source/drain implant steps
07/13/1999US5923981 Cascading transistor gate and method for fabricating the same
07/13/1999US5923980 Trench transistor with localized source/drain regions implanted through voids in trench
07/13/1999US5923979 Planar DMOS transistor fabricated by a three mask process
07/13/1999US5923978 Nonvolatile semiconductor memory and methods for manufacturing and using the same
07/13/1999US5923977 Method of forming CMOS circuitry including patterning a layer of conductive material overlying field isolation oxide
07/13/1999US5923976 Nonvolatile memory cell and method of fabricating the same
07/13/1999US5923975 Fabrication of natural transistors in a nonvolatile memory process
07/13/1999US5923974 Method of manufacture of memory device with high coupling ratio
07/13/1999US5923973 Method of making greek letter psi shaped capacitor for DRAM circuits
07/13/1999US5923972 DRAM cell capacitor fabrication method
07/13/1999US5923971 Reliable low resistance strap for trench storage DRAM cell using selective epitaxy
07/13/1999US5923970 Method of fabricating a ferrolelectric capacitor with a graded barrier layer structure
07/13/1999US5923969 Method for manufacturing a semiconductor device having a limited pocket region
07/13/1999US5923968 Method for producing semiconductor device
07/13/1999US5923967 Method for producing a thin film semiconductor device
07/13/1999US5923966 Laser processing method
07/13/1999US5923965 Thin film transistors and method of making
07/13/1999US5923964 Hydrogenation; coating with silicon nitride, then silicon dioxide
07/13/1999US5923963 Method of manufacturing a semiconductor display device
07/13/1999US5923962 Method for manufacturing a semiconductor device
07/13/1999US5923961 Method of making an active matrix type display
07/13/1999US5923959 Ball grid array (BGA) encapsulation mold
07/13/1999US5923958 Method for semiconductor chip packaging
07/13/1999US5923956 Without position accuracy deterioration in a high temperature process of glass sealing an electron gun with cold cathodes in a cathode ray tube
07/13/1999US5923955 Bonding pads with a pitch less than 15 microns on an integrated circuit; using a negative photoimagable polyimide
07/13/1999US5923954 Ball grid array package and fabrication method therefor
07/13/1999US5923952 Method of making a semiconductor device
07/13/1999US5923951 Method of making a flip-chip bonded GaAs-based opto-electronic device
07/13/1999US5923950 Growing aluminum nitride buffer layer on silicon carbide substrate; growing aluminum gallium indium nitride single crystal layer on aluminum nitride layer
07/13/1999US5923949 Semiconductor device having fluorine bearing sidewall spacers and method of manufacture thereof
07/13/1999US5923946 Subjecting a group iii nitride epitaxial layer on a silicon carbide substrate to a stress that sufficiently increases the number of dislocations in the epitaxial layer to make the epitaxial layer subject to attack and dissolution in a mineral
07/13/1999US5923915 Method and apparatus for processing resist
07/13/1999US5923719 Exposure apparatus and device manufacturing method using the same
07/13/1999US5923693 Discharge electrode, shape-restoration thereof, excimer laser oscillator, and stepper
07/13/1999US5923606 Semiconductor memory array
07/13/1999US5923605 Space-efficient semiconductor memory having hierarchical column select line architecture
07/13/1999US5923589 Non-volatile semiconductor memory device having long-life memory cells and data erasing method
07/13/1999US5923588 Non-volatile semiconductor memory device with a plurality of programming voltage levels
07/13/1999US5923587 Multi-bit memory cell array of a non-volatile semiconductor memory device and method for driving the same
07/13/1999US5923586 Nonvolatile memory with lockable cells
07/13/1999US5923584 Dual poly integrated circuit interconnect
07/13/1999US5923580 Semiconductor memory
07/13/1999US5923570 Clock wiring design method for integrated circuit
07/13/1999US5923562 Method for automatically eliminating three way intersection design conflicts in phase edge, phase shift designs
07/13/1999US5923553 Method for controlling a semiconductor manufacturing process by failure analysis feedback
07/13/1999US5923521 For retaining a workpiece