Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/1999
07/20/1999US5926713 Method for achieving global planarization by forming minimum mesas in large field areas
07/20/1999US5926712 Process for fabricating MOS device having short channel
07/20/1999US5926711 Method of forming an electrode of a semiconductor device
07/20/1999US5926710 Method for making dynamic random access memory cells using a novel stacked capacitor process
07/20/1999US5926709 Process of fabricating miniature memory cell having storage capacitor with wide surface area
07/20/1999US5926708 Method for providing multiple gate oxide thicknesses on the same wafer
07/20/1999US5926707 Methods for forming integrated circuit memory devices having deep storage electrode contact regions therein for improving refresh characteristics
07/20/1999US5926706 Method for making a trench-free buried contact with low resistance on semiconductor integrated circuits
07/20/1999US5926705 Method for manufacturing a semiconductor device with stabilization of a bipolar transistor and a schottky barrier diode
07/20/1999US5926704 Efficient method for fabricating P-wells and N-wells
07/20/1999US5926703 LDD device having a high concentration region under the channel
07/20/1999US5926701 Thin film transistor fabrication technique
07/20/1999US5926700 Semiconductor fabrication having multi-level transistors and high density interconnect therebetween
07/20/1999US5926699 Method of fabricating semiconductor device having stacked layer substrate
07/20/1999US5926698 Semiconductor memory device and method of fabricating the same
07/20/1999US5926697 Method of forming a moisture guard ring for integrated circuit applications
07/20/1999US5926696 Ball grid array plastic package
07/20/1999US5926695 Lead frame incorporating material flow diverters
07/20/1999US5926694 Semiconductor device and a manufacturing method thereof
07/20/1999US5926691 Removing moisture by annealing, forming shield film to reduce reintroduction of moisture
07/20/1999US5926690 Run-to-run control process for controlling critical dimensions
07/20/1999US5926689 Process for reducing circuit damage during PECVD in single wafer PECVD system
07/20/1999US5926688 Method of removing thin film layers of a semiconductor component
07/20/1999US5926615 Temperature compensation method for semiconductor wafers in rapid thermal processor using separated heat conducting rings as susceptors
07/20/1999US5926431 Semiconductor memory
07/20/1999US5926425 Memory with bit line discharge circuit elements
07/20/1999US5926420 Merged Memory and Logic (MML) integrated circuits including data path width reducing circuits and methods
07/20/1999US5926418 Method for programming a memory cell
07/20/1999US5926415 Semiconductor memory having NAND cell array and method of making thereof
07/20/1999US5926414 High-efficiency miniature magnetic integrated circuit structures
07/20/1999US5926402 Simulation method with respect to trace object that event occurs in proportion to probability and computer program product for causing computer system to perform the simulation
07/20/1999US5926398 Semiconductor device layout method capable of arranging functional cells with data signal lines and control signal lines having a proper length and configuration
07/20/1999US5926397 Routing design method and routing design apparatus
07/20/1999US5926372 For use with a high power switching module
07/20/1999US5926363 Solid electrolytic capacitor array and method for manufacturing the same
07/20/1999US5926360 Metallized oxide structure and fabrication
07/20/1999US5926359 Metal-insulator-metal capacitor
07/20/1999US5926358 Lead frame capacitor and capacitively-coupled isolator circuit using same
07/20/1999US5926353 For a mixed digital and analog signal integrated circuit
07/20/1999US5926257 Illumination optical system and exposure apparatus having the same
07/20/1999US5926235 Active matrix liquid crystal display and method of making
07/20/1999US5926061 Power supply noise eliminating method and semiconductor device
07/20/1999US5926056 Voltage tolerant output buffer
07/20/1999US5926030 Method of reducing a measuring time during an automatic measurement of integrated circuits
07/20/1999US5926028 Probe card having separated upper and lower probe needle groups
07/20/1999US5925973 Electronic component and method for producing the same
07/20/1999US5925937 Semiconductor wafer, wafer alignment patterns
07/20/1999US5925936 Semiconductor device for face down bonding to a mounting substrate and a method of manufacturing the same
07/20/1999US5925935 Semiconductor chip with shaped bonding pads
07/20/1999US5925934 Low cost and highly reliable chip-sized package
07/20/1999US5925932 Borderless vias
07/20/1999US5925931 Semiconductor device having interconnect lines and connection electrodes formed in groove portions of an insulating layer
07/20/1999US5925930 IC contacts with palladium layer and flexible conductive epoxy bumps
07/20/1999US5925924 Methods for precise definition of integrated circuit chip edges
07/20/1999US5925923 Merged single polysilicon bipolar NPN transistor
07/20/1999US5925922 Depletion controlled isolation stage
07/20/1999US5925921 Geometrical layout technique for a circular capacitor within an array of matched capacitors on a semiconductor device
07/20/1999US5925919 CMOS Semiconductor structure and process for producing the same
07/20/1999US5925918 Gate stack with improved sidewall integrity
07/20/1999US5925917 Contact programmable ROM and method of manufacturing the same
07/20/1999US5925916 Semiconductor processing method of providing electrical isolation between adjacent semiconductor diffusion regions of different field effect transistors and integrated circuitry having adjacent electrically isolated field effect transistors
07/20/1999US5925914 Asymmetric S/D structure to improve transistor performance by reducing Miller capacitance
07/20/1999US5925912 Semiconductor apparatus having a conductive sidewall structure
07/20/1999US5925911 Semiconductor device in which defects due to LOCOS or heat treatment are suppressed
07/20/1999US5925909 Three-dimensional complementary field effect transistor process and structures
07/20/1999US5925908 Integrated circuit including a non-volatile memory device and a semiconductor device
07/20/1999US5925907 Semiconductor device including transistor with composite gate structure and transistor with single gate structure
07/20/1999US5925906 Floating gate type non-volatile semiconductor memory device having separate tunnel and channel regions controlled by a single gate structure
07/20/1999US5925903 Field-effect transistors and method of manufacturing the same
07/20/1999US5925902 Semiconductor device having a schottky film with a vertical gap formed therein
07/20/1999US5925899 Vertical type insulated gate bipolar transistor having a planar gate structure
07/20/1999US5925895 Silica
07/20/1999US5925894 Thin film transistor with asymmetrically arranged gate electrode and offset region
07/20/1999US5925887 Projection exposure apparatus including an optical characteristic detector for detecting a change in optical characteristic of a projection optical system and device manufacturing method using the same
07/20/1999US5925886 Ion source and an ion implanting apparatus using it
07/20/1999US5925605 Cleaning and molding for semiconductors using unvulcanized rubber
07/20/1999US5925578 Method for forming fine patterns of a semiconductor device
07/20/1999US5925577 Method for forming via contact hole in a semiconductor device
07/20/1999US5925576 Plugging selected perforations in a carrier assembly used for polishing semiconductor wafers; plug has pressure-resistant portion with leak resistant portion extending therefrom, designed to fit snugly into bottom portion
07/20/1999US5925575 Silicon nitride layer is deposited using low pressure chemical vapor deposition or plasma enhnaced chemical vapor deposition, etching the nitride layer with a etchant containing chloroform, carbon tetrafluoride, argon, oxygen
07/20/1999US5925574 Doping boron impurity from adsorption layer into semiconductor region to form a base region on collector region, formed bipolar tansistor having superimposed collector, base and emitter regions on a substrate
07/20/1999US5925495 Photoresist laminate and method for patterning using the same
07/20/1999US5925492 Storage stable resin for photoresists and integrated circuits
07/20/1999US5925445 Printed wiring board
07/20/1999US5925444 Binder with good removability: a water insoluble polymer having a vinyl monomer and a dispersion stabilizer water soluble polymer in an aqueous medium; multilayer ceramic substrates
07/20/1999US5925443 Copper-based paste containing copper aluminate for microstructural and shrinkage control of copper-filled vias
07/20/1999US5925411 Vapor deposition of films on semiconductors
07/20/1999US5925410 Multilayer element with dielectric material on substrate
07/20/1999US5925310 Inserts are inserted into openings previously formed in a mold; a slurry of silicon carbide powder, organic binder and water is put in the mold; slip casting molding to obtain a molded green perforated product; semiconductor wafer boats
07/20/1999US5925265 Exerting the actions of an electric field and a magnetic field on a processing gas; high etch selectivity between a mask and an underlying layer
07/20/1999US5925260 Removal of polyimide from dies and wafers
07/20/1999US5925259 Applying material to stamp comprising deformable material, contacting stamp with substrate, filling depressions, bringing surface of stamp into contact with substrate such that surface of stamp forms seal around openings
07/20/1999US5925227 Multichamber sputtering apparatus
07/20/1999US5925226 Apparatus and method for clamping a substrate
07/20/1999US5925225 Method of producing smooth titanium nitride films having low resistivity
07/20/1999US5925213 Wet processing apparatus with movable partitioning plate between two processing chambers
07/20/1999US5925212 Apparatus and method for attaining repeatable temperature versus time profiles for plasma heated interactive parts used in mass production plasma processing
07/20/1999US5925188 Film forming apparatus
07/20/1999US5925167 Flowing exhaust gas from vapor deposition chamber into duct having three-way valve selectively adjusted to direct different fractions of gas to treatment/collection/exhaust points
07/20/1999US5925147 Process for producing single crystals