Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/1999
12/28/1999US6008535 Method of making a semiconductor diode from laminated ceramic tape
12/28/1999US6008527 Diode device
12/28/1999US6008526 Device isolation layer for a semiconductor device
12/28/1999US6008524 Integrated injection logic semiconductor device
12/28/1999US6008523 Electrical fuses with tight pitches and method of fabrication in semiconductors
12/28/1999US6008522 Structure of buried bit line
12/28/1999US6008521 Integrated circuit employing simultaneously formed isolation and transistor trenches
12/28/1999US6008519 Vertical transistor and method
12/28/1999US6008517 High density and low power flash memories with a high capacitive-coupling ratio
12/28/1999US6008515 Stacked capacitor having improved charge storage capacity
12/28/1999US6008514 Double-crown shape capacitor with high-dielectric constant material
12/28/1999US6008513 Dynamic random access memory (DRAM) cells with minimum active cell areas using sidewall-space bit lines
12/28/1999US6008510 Silicon on insulator master slice semiconductor integrated circuit
12/28/1999US6008509 Field effect transistor
12/28/1999US6008505 Thin film transistor and method for fabricating the same
12/28/1999US6008503 Oxide film thickness standards
12/28/1999US6008498 Charged particle beam apparatus and method of using the same
12/28/1999US6008495 Electron beam exposure device
12/28/1999US6008477 Heat treatment apparatus
12/28/1999US6008143 Metal organic chemical vapor deposition apparatus and deposition method
12/28/1999US6008142 Fabrication process of semiconductor device
12/28/1999US6008141 Semiconductor device and fabrication method thereof
12/28/1999US6008140 Copper etch using HCI and HBr chemistry
12/28/1999US6008139 Method of etching polycide structures
12/28/1999US6008137 Pattern formation of silicon nitride
12/28/1999US6008136 Etching gas mixture of fluorocarbon and hydrogen
12/28/1999US6008135 Method for etching metal layer of a semiconductor device using hard mask
12/28/1999US6008134 Process for forming semiconductor device using beveled clamp fingers in an etching system
12/28/1999US6008133 Method and apparatus for dry etching
12/28/1999US6008132 Dry etching suppressing formation of notch
12/28/1999US6008131 Bottom rounding in shallow trench etching using a highly isotropic etching step
12/28/1999US6008130 Polymer adhesive plasma confinement ring
12/28/1999US6008129 Process for forming a semiconductor device
12/28/1999US6008128 Method for smoothing surface of silicon single crystal substrate
12/28/1999US6008127 Semiconductor device having etching stopper layer formed by oxidation and method of fabricating the same
12/28/1999US6008126 Membrane dielectric isolation IC fabrication
12/28/1999US6008125 Method of eliminating buried contact resistance in integrated circuits
12/28/1999US6008124 Semiconductor device having improved lamination-structure reliability for buried layers, silicide films and metal films, and a method for forming the same
12/28/1999US6008123 Method for using a hardmask to form an opening in a semiconductor substrate
12/28/1999US6008121 Etching high aspect contact holes in solid state devices
12/28/1999US6008120 Silicon oxynitride cap for fluorinated silicate glass film in intermetal dielectric semiconductor fabrication
12/28/1999US6008119 Polishing first with slurry, avoiding overpolishing, polishing next with deionized water
12/28/1999US6008118 Forming barrier layer, forming tungsten layer, forming silicon oxy-fluoride layer, forming oxide layer, patterning oxide layer, nitriding
12/28/1999US6008117 Method of forming diffusion barriers encapsulating copper
12/28/1999US6008116 Selective etching for improved dielectric interlayer planarization
12/28/1999US6008115 Method for forming structure of wires for a semiconductor device
12/28/1999US6008114 Method of forming dual damascene structure
12/28/1999US6008113 Process for wafer bonding in a vacuum
12/28/1999US6008112 Method for planarized self-aligned floating gate to isolation
12/28/1999US6008111 Method of manufacturing semiconductor device
12/28/1999US6008110 Semiconductor substrate and method of manufacturing same
12/28/1999US6008109 Trench isolation structure having a low K dielectric encapsulated by oxide
12/28/1999US6008108 Method of fabricating a shallow-trench isolation structure in an integrated circuit
12/28/1999US6008107 Method of planarizing integrated circuits with fully recessed isolation dielectric
12/28/1999US6008106 Micro-trench oxidation by using rough oxide mask for field isolation
12/28/1999US6008105 Method of planarizing an insulator film using multiple etching steps
12/28/1999US6008104 Method of fabricating a trench capacitor with a deposited isolation collar
12/28/1999US6008103 Method for forming trench capacitors in an integrated circuit
12/28/1999US6008102 Method of forming a three-dimensional integrated inductor
12/28/1999US6008101 Laser processing method of semiconductor device
12/28/1999US6008100 Metal-oxide semiconductor field effect transistor device fabrication process
12/28/1999US6008099 Fabrication process employing a single dopant implant for formation of a drain extension region and a drain region of an LDD MOSFET using enhanced lateral diffusion
12/28/1999US6008098 Ultra shallow junction formation using amorphous silicon layer
12/28/1999US6008097 MOS transistor of semiconductor device and method of manufacturing the same
12/28/1999US6008096 Ultra short transistor fabrication method
12/28/1999US6008095 Process for formation of isolation trenches with high-K gate dielectrics
12/28/1999US6008094 Optimization of logic gates with criss-cross implants to form asymmetric channel regions
12/28/1999US6008093 Method of making a mask ROM
12/28/1999US6008092 Short channel IGBT with improved forward voltage drop and improved switching power loss
12/28/1999US6008091 Floating gate avalanche injection MOS transistors with high K dielectric control gates
12/28/1999US6008090 Method of forming high density flash memories with high capacitive-couping ratio and high speed operation
12/28/1999US6008089 Method of fabricating a split gate flash memory device
12/28/1999US6008088 Method for fabricating a semiconductor memory device
12/28/1999US6008087 Method to form high density NAND structure nonvolatile memories
12/28/1999US6008086 Method of deposting uniform dielectric film deposition on textured surfaces
12/28/1999US6008085 Design and a novel process for formation of DRAM bit line and capacitor node contacts
12/28/1999US6008084 Method for fabricating low resistance bit line structures, along with bit line structures exhibiting low bit line to bit line coupling capacitance
12/28/1999US6008083 Precision analog metal-metal capacitor
12/28/1999US6008082 Method of making a resistor, method of making a diode, and SRAM circuitry and other integrated circuitry
12/28/1999US6008081 Method of forming electrostatic discharge protection structure of dynamic random access memory
12/28/1999US6008080 Method of making a low power SRAM
12/28/1999US6008079 Method for forming a high density shallow trench contactless nonvolatile memory
12/28/1999US6008078 Method for manufacturing a semiconductor device
12/28/1999US6008077 Method for fabricating semiconductor device
12/28/1999US6008076 Thin film transistor and semiconductor device and method for forming the same
12/28/1999US6008075 Method for simultaneous formation of contacts between metal layers and fuse windows in semiconductor manufacturing
12/28/1999US6008074 Method of forming a synchronous-link dynamic random access memory edge-mounted device
12/28/1999US6008072 Tape automated bonding method
12/28/1999US6008071 Method of forming solder bumps onto an integrated circuit device
12/28/1999US6008070 Wafer level fabrication and assembly of chip scale packages
12/28/1999US6008069 Fabrication process of a semiconductor device including a dicing process of a semiconductor wafer
12/28/1999US6008068 Process for etching a semiconductor lead frame
12/28/1999US6008065 Method for manufacturing a liquid crystal display
12/28/1999US6008061 Method of manufacturing semiconductor device having a test pad
12/28/1999US6008060 Detecting registration marks with a low energy electron beam
12/28/1999US6007969 Ultra-fine microfabrication method using an energy beam
12/28/1999US6007968 Method for forming features using frequency doubling hybrid resist and device formed thereby
12/28/1999US6007951 Etching alignment guide using etchmask into semiconductor substrate; analyzing undercutting to determine pattern structure; selecting alignment aperture in second mask corresponding to pattern structure; aligning aperture
12/28/1999US6007949 Method of extracting a mask pattern for an electron beam exposure
12/28/1999US6007948 Method of fabricating X-ray masks with reduced errors
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