Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
04/2000
04/11/2000US6049203 Apparatus and method for testing an inker of the semiconductor wafer probe station
04/11/2000US6049200 Voltage regulator capable of lowering voltage applied across phase compensating capacitor
04/11/2000US6049186 Method for making and operating an exposure apparatus having a reaction frame
04/11/2000US6049148 Integrated magnetic levitation and rotation system
04/11/2000US6049136 Integrated circuit having unique lead configuration
04/11/2000US6049135 Bed structure underlying electrode pad of semiconductor device and method for manufacturing same
04/11/2000US6049134 Mask generation technique for producing an integrated circuit with optimal metal interconnect layout for achieving global planarization
04/11/2000US6049133 Semiconductor fabrication employing concurrent diffusion barrier and salicide formation
04/11/2000US6049131 Device formed by selective deposition of refractory metal of less than 300 Angstroms of thickness
04/11/2000US6049130 Semiconductor device using gold bumps and copper leads as bonding elements
04/11/2000US6049128 Semiconductor device
04/11/2000US6049124 Semiconductor package
04/11/2000US6049123 Ultra high density integrated circuit packages
04/11/2000US6049122 Flip chip mounting substrate with resin filled between substrate and semiconductor chip
04/11/2000US6049121 Tape carrier package and liquid crystal display device including such tape carrier package
04/11/2000US6049119 Protection circuit for a semiconductor device
04/11/2000US6049114 Semiconductor device having a metal containing layer overlying a gate dielectric
04/11/2000US6049113 Semiconductor device and semiconductor device manufacturing method
04/11/2000US6049111 Semiconductor device including protective circuit with guard ring
04/11/2000US6049110 Body driven SOI-MOS field effect transistor
04/11/2000US6049108 Trench-gated MOSFET with bidirectional voltage clamping
04/11/2000US6049107 Sub-quarter-micron MOSFET and method of its manufacturing
04/11/2000US6049106 Large grain single crystal vertical thin film polysilicon MOSFETs
04/11/2000US6049105 DRAM cell arrangement having dynamic self-amplifying memory cells, and method for manufacturing same
04/11/2000US6049104 MOSFET device to reduce gate-width without increasing JFET resistance
04/11/2000US6049103 Semiconductor capacitor
04/11/2000US6049102 Semiconductor memory
04/11/2000US6049101 Processing methods of forming a capacitor, and capacitor construction
04/11/2000US6049098 Bipolar transistor having an emitter region formed of silicon carbide
04/11/2000US6049097 Reliable HEMT with small parasitic resistance
04/11/2000US6049093 Planar thin film transistor formation
04/11/2000US6049092 Semiconductor device and method for manufacturing the same
04/11/2000US6049091 High electron mobility transistor
04/11/2000US6049085 Charged particle beam exposure method and method for making patterns on wafer
04/11/2000US6049084 Charged-particle-beam optical system
04/11/2000US6049038 Flip-chip resin sealing structure and resin sealing method
04/11/2000US6048804 Process for producing nanoporous silica thin films
04/11/2000US6048803 Method of fabricating a semiconductor device having fluorine bearing oxide between conductive lines
04/11/2000US6048802 Selective nonconformal deposition for forming low dielectric insulation between certain conductive lines
04/11/2000US6048801 Method of forming interlayer film
04/11/2000US6048800 Process for planarizing surface of a semiconductor device
04/11/2000US6048799 Device fabrication involving surface planarization
04/11/2000US6048798 Apparatus for reducing process drift in inductive coupled plasma etching such as oxide layer
04/11/2000US6048797 Method of manufacturing interconnects
04/11/2000US6048796 Method of manufacturing multilevel metal interconnect
04/11/2000US6048795 Process of fabricating a semiconductor device having nitrogen-containing silicon layer and refractory metal layer
04/11/2000US6048794 Selective W CVD plug process with a RTA self-aligned W-silicide barrier layer
04/11/2000US6048793 Method and apparatus for thin film growth
04/11/2000US6048792 Method for manufacturing an interconnection structure in a semiconductor device
04/11/2000US6048791 Semiconductor device with electrode formed of conductive layer consisting of polysilicon layer and metal-silicide layer and its manufacturing method
04/11/2000US6048790 Metalorganic decomposition deposition of thin conductive films on integrated circuits using reducing ambient
04/11/2000US6048789 IC interconnect formation with chemical-mechanical polishing and silica etching with solution of nitric and hydrofluoric acids
04/11/2000US6048788 Method of fabricating metal plug
04/11/2000US6048787 Borderless contacts for dual-damascene interconnect process
04/11/2000US6048786 Process for forming fluorinated resin or amorphous carbon layer and devices containing same
04/11/2000US6048785 Semiconductor fabrication method of combining a plurality of fields defined by a reticle image using segment stitching
04/11/2000US6048784 Transistor having an improved salicided gate and method of construction
04/11/2000US6048783 Method of forming an electrode on a substrate of a semiconductor device
04/11/2000US6048782 Method for doped shallow junction formation using direct gas-phase doping
04/11/2000US6048781 Semiconductor processing method for providing large grain polysilicon films
04/11/2000US6048780 Semiconductor device and manufacturing method for the same
04/11/2000US6048778 Gettering regions and methods of forming gettering regions within a semiconductor wafer
04/11/2000US6048777 Fabrication of high power semiconductor devices with respective heat sinks for integration with planar microstrip circuitry
04/11/2000US6048776 Semiconductor device and a method of fabricating the same
04/11/2000US6048775 Method to make shallow trench isolation structure by HDP-CVD and chemical mechanical polish processes
04/11/2000US6048773 Methods of forming bipolar junction transistors having preferred base electrode extensions and transistors formed thereby
04/11/2000US6048772 Method for fabricating a lateral RF MOS device with an non-diffusion source-backside connection
04/11/2000US6048771 Shallow trench isolation technique
04/11/2000US6048770 Nonvolatile semiconductor memory device and method of manufacturing the same
04/11/2000US6048769 CMOS integrated circuit having PMOS and NMOS devices with different gate dielectric layers
04/11/2000US6048768 Method of manufacturing flash memory
04/11/2000US6048766 Flash memory device having high permittivity stacked dielectric and fabrication thereof
04/11/2000US6048765 Method of forming high density buried bit line flash EEPROM memory cell with a shallow trench floating gate
04/11/2000US6048764 Method for producing semiconductor device with capacitor stacked
04/11/2000US6048763 Integrated capacitor bottom electrode with etch stop layer
04/11/2000US6048762 Method of fabricating embedded dynamic random access memory
04/11/2000US6048761 Method for manufacturing a semiconductor device with self-aligned protection diode
04/11/2000US6048760 Method of forming a self-aligned refractory metal silicide contact using doped field oxide regions
04/11/2000US6048759 Gate/drain capacitance reduction for double gate-oxide DMOS without degrading avalanche breakdown
04/11/2000US6048758 Method for crystallizing an amorphous silicon thin film
04/11/2000US6048756 Method for making a silicon-on-insulator MOS transistor using a selective SiGe epitaxy
04/11/2000US6048753 Standardized bonding location process and apparatus
04/11/2000US6048750 Method for aligning and connecting semiconductor components to substrates
04/11/2000US6048749 Fabrication process of a semiconductor device including grinding of a semiconductor wafer
04/11/2000US6048747 Laser bar cleaving apparatus
04/11/2000US6048745 Method for mapping scratches in an oxide film
04/11/2000US6048743 Using a submicron level dimension reference
04/11/2000US6048742 Process for measuring the thickness and composition of thin semiconductor films deposited on semiconductor wafers
04/11/2000US6048741 Top-surface-metallurgy plate-up bonding and rewiring for multilayer devices
04/11/2000US6048740 Lithography for fabrication of ferroelectric memory transistors, dopes of boron
04/11/2000US6048738 Method of making ferroelectric memory cell for VLSI RAM array
04/11/2000US6048737 Forming conductive oxide layer between a metal electrode and a ferroelectric layer, capable of enhancing the fatigue behavior in addition to reducing the leakage current
04/11/2000US6048690 Methods for electronic fluorescent perturbation for analysis and electronic perturbation catalysis for synthesis
04/11/2000US6048671 Ultra-fine microfabrication method using an energy beam
04/11/2000US6048669 Optical recording material with photoresists with heat treatment and ulraviolet radiation focusing with lenses
04/11/2000US6048668 Polarity electric charge, applying resist to face of film, exposure and development then etching
04/11/2000US6048665 Process for making a photoactive compound and photoresist therefrom
04/11/2000US6048663 Negative-working photoresist compositions and and use thereof
04/11/2000US6048656 Joining a semiconductor to a substrate, electrically and mechanically connecting, leaving a gap, providing a dam on the substrate, insertion an underfill and applying a a vacuum
04/11/2000US6048655 Method of carrying and aligning a substrate
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