Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2000
05/02/2000US6057402 Blend of cycloaliphatic epoxy resins, cyanate esters, lewis acid catalyst and flexibility modifier
05/02/2000US6057381 Method of making an electronic component using reworkable underfill encapsulants
05/02/2000US6057251 Method for forming interlevel dielectric layer in semiconductor device using electron beams
05/02/2000US6057250 Low temperature reflow dielectric-fluorinated BPSG
05/02/2000US6057248 Method of removing residual contaminants in an alignment mark after a CMP process
05/02/2000US6057247 Method for fabricating semiconductor device and method for controlling environment inside reaction chamber of dry etching apparatus
05/02/2000US6057246 Method for etching a metal layer with dimensional control
05/02/2000US6057245 Gas phase planarization process for semiconductor wafers
05/02/2000US6057244 Method for improved sputter etch processing
05/02/2000US6057243 Method for producing semiconductor device
05/02/2000US6057242 Flat interlayer insulating film suitable for multi-layer wiring
05/02/2000US6057241 Method of manufacturing a semiconductor integrated circuit device
05/02/2000US6057240 Aqueous surfactant solution method for stripping metal plasma etch deposited oxidized metal impregnated polymer residue layers from patterned metal layers
05/02/2000US6057239 Dual damascene process using sacrificial spin-on materials
05/02/2000US6057238 Introducing hydrogen gas and oxygen gas along with argon gas into a sputter deposition vacuum chamber during depositing an aluminum or aluminum alloys onto a semiconductor; free of hillock, low resistivity, smoothness and low residual stress
05/02/2000US6057237 Tantalum-containing barrier layers for copper
05/02/2000US6057236 CVD/PVD method of filling structures using discontinuous CVD AL liner
05/02/2000US6057235 Method for reducing surface charge on semiconducter wafers to prevent arcing during plasma deposition
05/02/2000US6057234 Method for fabricating semiconductor device
05/02/2000US6057233 Laser ablation in a vacuum chamber to cause emission of a substance from the target and vapor depositing a thin film on a substrate
05/02/2000US6057232 Wiring structure for semiconductor device and fabrication method therefor
05/02/2000US6057230 Dry etching procedure and recipe for patterning of thin film copper layers
05/02/2000US6057229 Method for metallizing submicron contact holes in semiconductor bodies
05/02/2000US6057228 Method of forming interconnection for semiconductor device
05/02/2000US6057227 Oxide etch stop techniques for uniform damascene trench depth
05/02/2000US6057226 Air gap based low dielectric constant interconnect structure and method of making same
05/02/2000US6057225 Semiconductor integrated circuit device having fundamental cells and method of manufacturing the semiconductor integrated circuit device using the fundamental cells
05/02/2000US6057224 Methods for making semiconductor devices having air dielectric interconnect structures
05/02/2000US6057223 Passivated copper conductive layers for microelectronic applications
05/02/2000US6057222 Method for the production of flip-chip mounting-ready contacts of electrical components
05/02/2000US6057221 Laser-induced cutting of metal interconnect
05/02/2000US6057220 Titanium polycide stabilization with a porous barrier
05/02/2000US6057219 Method of forming an ohmic contact to a III-V semiconductor material
05/02/2000US6057218 Method for simultaneously manufacturing poly gate and polycide gate
05/02/2000US6057217 Process for production of semiconductor device with foreign element introduced into silicon dioxide film
05/02/2000US6057216 Low temperature diffusion process for dopant concentration enhancement
05/02/2000US6057215 Process for forming a refractory metal silicide film having a uniform thickness
05/02/2000US6057214 Silicon-on-insulation trench isolation structure and method for forming
05/02/2000US6057213 Methods of forming polycrystalline semiconductor layers
05/02/2000US6057212 Method for making bonded metal back-plane substrates
05/02/2000US6057211 Method for manufacturing an integrated circuit arrangement
05/02/2000US6057210 Method of making a shallow trench isolation for ULSI formation via in-direct CMP process
05/02/2000US6057209 Semiconductor device having a nitrogen bearing isolation region
05/02/2000US6057208 Method of forming shallow trench isolation
05/02/2000US6057207 Shallow trench isolation process using chemical-mechanical polish with self-aligned nitride mask on HDP-oxide
05/02/2000US6057205 Method to form a ragged poly-Si structure for high density DRAM cells
05/02/2000US6057204 Method of making a noise-isolated buried resistor by implanting a first well with a mask and then implanting an opposite conductivity well with a larger opening in the mask
05/02/2000US6057203 Integrated circuit capacitor
05/02/2000US6057202 Method for manufacturing an inductor with resonant frequency and Q value increased in semiconductor process
05/02/2000US6057201 Method of producing a transistor structure
05/02/2000US6057200 Method of making a field effect transistor having an elevated source and an elevated drain
05/02/2000US6057199 Method of producing a semiconductor body
05/02/2000US6057198 Semiconductor processing method of forming a buried contact
05/02/2000US6057197 Isolation scheme to prevent field oxide edge from oxide loss
05/02/2000US6057196 Self-aligned contact process comprising a two-layer spacer wherein one layer is at a level lower than the top surface of the gate structure
05/02/2000US6057195 Method of fabricating high density flat cell mask ROM
05/02/2000US6057194 Method of forming trench transistor in combination with trench array
05/02/2000US6057193 Elimination of poly cap for easy poly1 contact for NAND product
05/02/2000US6057192 Process for making crosspoint memory devices with cells having a source channel which is autoaligned to the bit line and to the field oxide
05/02/2000US6057191 Process for the fabrication of integrated circuits with contacts self-aligned to active areas
05/02/2000US6057190 Method of manufacturing semiconductor device
05/02/2000US6057189 Method of fabricating capacitor utilizing an ion implantation method
05/02/2000US6057186 Method for improving the butted contact resistance of an SRAM by double Vcc implantation
05/02/2000US6057185 Method of manufacturing semiconductor device
05/02/2000US6057184 Semiconductor device fabrication method using connecting implants
05/02/2000US6057183 Manufacturing method of drive circuit of active matrix device
05/02/2000US6057182 Hydrogenation of polysilicon thin film transistors
05/02/2000US6057181 Thin film transistor and method for fabricating same
05/02/2000US6057180 Method of severing electrically conductive links with ultraviolet laser output
05/02/2000US6057179 Method and structure for packaging an integrated circuit with readily removed excess encapsulant on degating region
05/02/2000US6057178 Method of padding an electronic component, mounted on a flat substrate, with a liquid filler
05/02/2000US6057174 Semiconductor device, method of fabricating the same, and electronic apparatus
05/02/2000US6057173 Ablative bond pad formation
05/02/2000US6057170 Method of measuring waviness in silicon wafers
05/02/2000US6057168 Forming bumps on a dummy wafer, dicing to form dummy chips, inspecting bumps on chips, then only transferring bumps which pass inspection onto the real chips on which circuit patterns are formed; improving production yield
05/02/2000US6057084 Controlled amine poisoning for reduced shrinkage of features formed in photoresist
05/02/2000US6057083 Polymers and photoresist compositions
05/02/2000US6057081 Process for manufacturing semiconductor integrated circuit device
05/02/2000US6057080 Top antireflective coating film
05/02/2000US6057068 Method for determining the efficiency of a planarization process
05/02/2000US6057066 Method of producing photo mask
05/02/2000US6057038 Organic insulating film, and either an inorganic insulating film or transparent conductive film; the two films are adhered with a silane coupling having alkoxy group and either a polyether, alkyl, or epoxy group; silazane; or chlorosilane
05/02/2000US6057036 Semiconductor substrate having a serious effect of gettering heavy metal and method of manufacturing the same
05/02/2000US6057005 Plasma cvd process, high-frequency power introducing electrode to generate a plasma in the film forming chamber, microcrystalline silicon film with excellent electrical and optical characteristics to be formed even at high forming
05/02/2000US6056998 Captured materials such as resists are not removed from a filter when a coating solution is spurted out.
05/02/2000US6056994 Liquid deposition methods of fabricating layered superlattice materials
05/02/2000US6056931 Silicon wafer for hydrogen heat treatment and method for manufacturing the same
05/02/2000US6056869 Electrolytic deplating of metal from side edges and backside of semiconductors
05/02/2000US6056864 Electrolytically reducing thickness; semiconductors
05/02/2000US6056850 Apparatus for improving the performance of a temperature-sensitive etch process
05/02/2000US6056849 Apparatus for the surface treatment of workpieces by means of a plasma
05/02/2000US6056848 Thin film electrostatic shield for inductive plasma processing
05/02/2000US6056828 Holding by suction; switching to select support; unloading
05/02/2000US6056825 Rotary chuck including pins for lifting wafers
05/02/2000US6056824 Free floating shield and semiconductor processing system
05/02/2000US6056823 Temperature controlled gas feedthrough
05/02/2000US6056819 Method for pulling a single crystal
05/02/2000US6056818 Method of manufacturing a silicon monocrystal, and method of holding the same
05/02/2000US6056795 Stiffly bonded thin abrasive wheel
05/02/2000US6056785 Electron-beam data generating apparatus