Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2000
07/04/2000US6083852 Method for applying films using reduced deposition rates
07/04/2000US6083851 HSQ with high plasma etching resistance surface for borderless vias
07/04/2000US6083850 Depositing hydrogen silsesquioxane(hsq) gap fill layer on patterned metal layer for gap filling leaving non-planar upper surface; depositing thin layer of silicon oxide and planarizing surface, depositing hsq dielectric interlayer
07/04/2000US6083849 Methods of forming hemispherical grain polysilicon
07/04/2000US6083848 Removing solder from integrated circuits for failure analysis
07/04/2000US6083847 Method for manufacturing local interconnect
07/04/2000US6083846 Graded MOS transistor junction formed by aligning a sequence of implants to a selectively removable polysilicon sidewall space and oxide thermally grown thereon
07/04/2000US6083845 Etching method
07/04/2000US6083844 Techniques for etching an oxide layer
07/04/2000US6083842 Fabrication of a via plug having high aspect ratio with a diffusion barrier layer effectively surrounding the via plug
07/04/2000US6083841 Method of etching gallium-nitride based compound semiconductor layer and method of manufacturing semiconductor light emitting device utilizing the same
07/04/2000US6083840 Slurry compositions and method for the chemical-mechanical polishing of copper and copper alloys
07/04/2000US6083839 Unique chemical mechanical planarization approach which utilizes magnetic slurry for polish and magnetic fields for process control
07/04/2000US6083838 Oxidizing metal on surface of semiconductor wafer by a slurry comprising abrasive and oxidizing agent, and adding surfactant to reduce rate of oxidaton; removing oxidation product with abrasive to produce planarized surface
07/04/2000US6083837 Fabrication of components by coining
07/04/2000US6083836 Transistors with substitutionally formed gate structures and method
07/04/2000US6083835 Self-passivation of copper damascene
07/04/2000US6083834 Zincate catalysis electroless metal deposition for via metal interconnection
07/04/2000US6083833 Method for forming conductive film for semiconductor device
07/04/2000US6083832 Method of manufacturing semiconductor device
07/04/2000US6083831 Semiconductor processing method of forming a contact pedestal, of forming a storage node of a capacitor
07/04/2000US6083830 Process for manufacturing a semiconductor device
07/04/2000US6083829 Use of a low resistivity Cu3 Ge interlayer as an adhesion promoter between copper and tin layers
07/04/2000US6083828 Method for forming a self-aligned contact
07/04/2000US6083827 Method for fabricating local interconnect
07/04/2000US6083826 Method for manufacturing semiconductor device capable of improving planarization
07/04/2000US6083825 Method of forming unlanded via hole
07/04/2000US6083824 Borderless contact
07/04/2000US6083823 Metal deposition process for metal lines over topography
07/04/2000US6083822 Fabrication process for copper structures
07/04/2000US6083821 Integrated circuit having a void between adjacent conductive lines
07/04/2000US6083820 Mask repattern process
07/04/2000US6083819 Method and assembly for providing improved underchip encapsulation
07/04/2000US6083818 Electronic devices with strontium barrier film and process for making same
07/04/2000US6083817 Cobalt silicidation using tungsten nitride capping layer
07/04/2000US6083816 Semiconductor device and method of manufacturing the same
07/04/2000US6083815 Pitting of the silicon beneath the gate oxide, caused by penetration of polysilicon etchant through the gate oxide is resolved.
07/04/2000US6083814 Method for producing a pn-junction for a semiconductor device of SiC
07/04/2000US6083813 Method for forming a compound semiconductor device using a buffer layer over a corrugated surface
07/04/2000US6083812 Heteroepitaxy by large surface steps
07/04/2000US6083811 Method for producing thin dice from fragile materials
07/04/2000US6083810 Poly buffered locos process is disclosed. amorphous silicon is formed by decomposition of disilane at temperatures between 400-525.degree. c. the amorphous silicon exhibits less pits than what is produced by conventional processes
07/04/2000US6083809 Oxide profile modification by reactant shunting
07/04/2000US6083808 Method for forming a trench isolation in a semiconductor device
07/04/2000US6083805 Method of forming capacitors in a semiconductor device
07/04/2000US6083804 Method for fabricating a capacitor in a dynamic random access memory
07/04/2000US6083803 Semiconductor processing methods of forming a conductive projection and methods of increasing alignment tolerances
07/04/2000US6083802 Method for forming an inductor
07/04/2000US6083801 Manufacturing method of semiconductor and manufacturing method of semiconductor device
07/04/2000US6083800 Method for fabricating high voltage semiconductor device
07/04/2000US6083799 Semiconductor processing method of forming a field effect transistor
07/04/2000US6083798 Method of producing a metal oxide semiconductor device with raised source/drain
07/04/2000US6083797 Buried shallow trench isolation and method for forming the same
07/04/2000US6083796 Semiconductor device and method for fabricating the same
07/04/2000US6083795 Large angle channel threshold implant for improving reverse narrow width effect
07/04/2000US6083794 Method to perform selective drain engineering with a non-critical mask
07/04/2000US6083793 Method to manufacture nonvolatile memories with a trench-pillar cell structure for high capacitive coupling ratio
07/04/2000US6083792 Manufacturing process of a split gate flash memory unit
07/04/2000US6083791 Self-aligned stacked gate etch process for fabricating a two-transistor EEPROM cell
07/04/2000US6083790 Method for making y-shaped multi-fin stacked capacitors for dynamic random access memory cells
07/04/2000US6083789 Method for manufacturing DRAM capacitor
07/04/2000US6083788 Stacked capacitor memory cell and method of manufacture
07/04/2000US6083787 Method of fabricating deep trench capacitors for dram cells
07/04/2000US6083786 Method for fabricating a load in a static random access memory
07/04/2000US6083785 Method of manufacturing semiconductor device having resistor film
07/04/2000US6083784 Semiconductor device having MOS transistor
07/04/2000US6083783 Method of manufacturing complementary metallic-oxide-semiconductor
07/04/2000US6083782 High performance GaAs field effect transistor structure
07/04/2000US6083781 Method for manufacturing compound semiconductor field-effect transistors with improved DC and high frequency performance
07/04/2000US6083780 Semiconductor device and method of fabrication thereof
07/04/2000US6083779 Method for fabricating a thin film transistor of a liquid crystal device
07/04/2000US6083778 Localized semiconductor substrate for multilevel for transistors
07/04/2000US6083775 Method of encapsulating a chip
07/04/2000US6083774 Method of fabricating a flip chip mold injected package
07/04/2000US6083773 Methods of forming flip chip bumps and related flip chip bump constructions
07/04/2000US6083772 Method of mounting a power semiconductor die on a substrate
07/04/2000US6083768 Inverted orientation until the viscous material dries or cures enough to maintain definition
07/04/2000US6083766 Packaging method of thin film passive components on silicon chip
07/04/2000US6083765 Method for producing semiconductor memory device having a capacitor
07/04/2000US6083764 Method of fabricating an MTJ with low areal resistance
07/04/2000US6083666 Method of forming a bump comprising protuberances
07/04/2000US6083665 Without the troubles due to reflection of the exposure light on the substrate surface, oximesulfonate compound as an acid-generating agent;
07/04/2000US6083659 Polymer mixture for photoresist and photoresist composition containing the same
07/04/2000US6083658 Alkoxymethyl-substituted phenol crosslinking agent, binder polymer, acid generator, and infrared radiation absorber; lithographic printing plates
07/04/2000US6083650 Device manufacturing method utilizing concentric fan-shaped pattern mask
07/04/2000US6083648 Microlithography reticle exhibiting reduced stresses and methods for manufacturing same
07/04/2000US6083572 Organic low-dielectric constant films deposited by plasma enhanced chemical vapor deposition
07/04/2000US6083569 Discharging a wafer after a plasma process for dielectric deposition
07/04/2000US6083568 Reducing organic material to form carbides for semiconductor wafers by injection of gas into reactors to form plasma :
07/04/2000US6083566 Substrates loading into lock chambers, pumping, loading and transferring
07/04/2000US6083451 Method of producing a polycrystalline alumina ceramic which is resistant to a fluorine-comprising plasma
07/04/2000US6083419 Polishing composition including an inhibitor of tungsten etching
07/04/2000US6083413 Hydrosilation; using halogen compound and organosilicon compound
07/04/2000US6083412 Plasma etch apparatus with heated scavenging surfaces
07/04/2000US6083376 Inserting a second electrode into a hollow first electrode and immersing both electrodes in a reaction solution; inducing a charge; rotating at least one of said hollow first electrode and said second electrode
07/04/2000US6083375 Each pad includes a base pad which is encapsulated within a series of successively electroplated metal encapsulating films to produce a corrosion-resistant terminal metal pad.
07/04/2000US6083363 Apparatus and method for uniform, low-damage anisotropic plasma processing
07/04/2000US6083361 Reactive gas atoms that react with the sputter particles released from the target produce a compound from the particle atoms and the reactive gas atoms that has a lower sticking characteristic to the side walls of the hole semiconductor
07/04/2000US6083358 Multiple species sputtering for improved bottom coverage and improved sputter rate
07/04/2000US6083324 Gettering technique for silicon-on-insulator wafers