Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2000
07/18/2000US6091498 Semiconductor processing apparatus having lift and tilt mechanism
07/18/2000US6091488 Method of and apparatus for automatic high-speed optical inspection of semi-conductor structures and the like through fluorescent photoresist inspection
07/18/2000US6091481 Positioning method and projection exposure apparatus using the method
07/18/2000US6091466 Liquid crystal display with dummy drain electrode and method of manufacturing same
07/18/2000US6091465 Method for fabricating liquid crystal display
07/18/2000US6091464 Method for manufacturing liquid crystal display capable of preventing electrical shorts between neighboring pixel electrodes and the liquid crystal display
07/18/2000US6091339 Position detector for a spin-drying machine used in integrated circuit fabrication
07/18/2000US6091318 Integral bump technology sense resistor
07/18/2000US6091277 Input buffer circuit for semiconductor IC circuit
07/18/2000US6091256 Contact device for making connection to an electronic circuit device
07/18/2000US6091254 Universal wafer carrier for wafer level die burn-in
07/18/2000US6091251 Discrete die burn-in for nonpackaged die
07/18/2000US6091250 Discrete die burn-in for nonpackaged die
07/18/2000US6091249 Method and apparatus for detecting defects in wafers
07/18/2000US6091248 Method for measuring the electrical potential in a semiconductor element
07/18/2000US6091202 Electron beam exposure apparatus with non-orthogonal electron emitting element matrix
07/18/2000US6091157 Method to improve internal package delamination and wire bond reliability using non-homogeneous molding compound pellets
07/18/2000US6091156 Semiconductor pellet having plural chips
07/18/2000US6091154 Semiconductor device with self-aligned contact and manufacturing method thereof
07/18/2000US6091152 Semiconductor device and method for fabricating the same
07/18/2000US6091151 Wiring layer and method of forming the wiring layer
07/18/2000US6091150 Integrated circuitry comprising electrically insulative material over interconnect line tops, sidewalls and bottoms
07/18/2000US6091149 Dissolvable dielectric method and structure
07/18/2000US6091148 Electrical connection for a semiconductor structure
07/18/2000US6091145 Thin multichip module including a connector frame socket
07/18/2000US6091143 Stacked leads-over chip multi-chip module
07/18/2000US6091141 Bump chip scale semiconductor package
07/18/2000US6091139 Semiconductor device
07/18/2000US6091136 Plastic lead frames for semiconductor devices
07/18/2000US6091135 Lead frame with pre-mold paddle for a semiconductor chip package
07/18/2000US6091134 Semiconductor lead frame and method for manufacturing the same
07/18/2000US6091130 Semiconductor device having structure suitable for CMP process
07/18/2000US6091129 Self-aligned trench isolated structure
07/18/2000US6091126 Electromagnetic wave detector
07/18/2000US6091123 Self-aligned SOI device with body contact and NiSi2 gate
07/18/2000US6091122 Fabrication of mid-cap metal gates compatible with ultra-thin dielectrics
07/18/2000US6091121 Semiconductor device and method for manufacturing the same
07/18/2000US6091120 Integrated circuit field effect transisters including multilayer gate electrodes having narrow and wide conductive layers
07/18/2000US6091119 Double poly-gate high density multi-state flat mask ROM cells
07/18/2000US6091118 Semiconductor device having reduced overlap capacitance and method of manufacture thereof
07/18/2000US6091117 Field effect transistor having elevated source and drain regions and methods of manufacturing the same
07/18/2000US6091116 CMOS device and method for manufacturing the same
07/18/2000US6091115 Semiconductor device including a crystalline silicon film
07/18/2000US6091112 Silicon on insulator semiconductor substrate and fabrication method therefor
07/18/2000US6091111 High voltage mos device having an extended drain region with different dopant species
07/18/2000US6091110 MOSFET device having recessed gate-drain shield and method
07/18/2000US6091109 Semiconductor device having different gate oxide thicknesses by implanting halogens in one region and nitrogen in the second region
07/18/2000US6091108 Semiconductor device of SiC having an insulated gate and buried grid region for high breakdown voltage
07/18/2000US6091106 Low voltage transistor structure having a grooved gate
07/18/2000US6091105 Method of making a self-aligned dopant enhanced RTA MOSFET
07/18/2000US6091104 Flash memory cell with self-aligned gates and fabrication process
07/18/2000US6091102 High-density nonvolatile memory cell
07/18/2000US6091101 Multi-level flash memory using triple well
07/18/2000US6091100 High density NAND structure nonvolatile memories
07/18/2000US6091099 Semiconductor device with tantalum and ruthenium
07/18/2000US6091098 Double-crown rugged polysilicon capacitor
07/18/2000US6091097 Semiconductor device and a method of manufacturing the same
07/18/2000US6091095 Semiconductor storage
07/18/2000US6091094 Vertical device formed adjacent to a wordline sidewall and method for semiconductor chips
07/18/2000US6091089 Semiconductor integrated circuit device
07/18/2000US6091088 Macro cell
07/18/2000US6091081 Insulating film comprising amorphous carbon fluoride, a semiconductor device comprising such an insulating film
07/18/2000US6091080 Evaluation method for wirings of semiconductor device
07/18/2000US6091077 MIS SOI semiconductor device with RTD and/or HET
07/18/2000US6091076 Quantum WELL MOS transistor and methods for making same
07/18/2000US6091060 Power and control system for a workpiece chuck
07/18/2000US6091056 Hot plate oven for processing flat panel displays and large wafers
07/18/2000US6091027 Via structure
07/18/2000US6090964 Organocuprous precursors for chemical vapor deposition of a copper film
07/18/2000US6090960 Cuprous (hexafluoroacetylacetonate) complex with a methoxysilylolefin
07/18/2000US6090727 Method for local oxidation of silicon (LOCOS) field isolation
07/18/2000US6090726 Liquid phase oxide deposition; seeding, nucleation
07/18/2000US6090725 Method for preventing bubble defects in BPSG film
07/18/2000US6090724 Carbiding porous silica in heated alkane gas
07/18/2000US6090723 Annealing and exposing to ultraviolet radiation; self-limiting oxidation; densification
07/18/2000US6090722 Doping; forming polymer
07/18/2000US6090721 Aqueous solutions of ammonium fluoride in propylene glycol and their use in the removal of etch residues from silicon substrates
07/18/2000US6090720 Immersion in acid solution; rotation; adjusting flow velocity
07/18/2000US6090719 Dry etching method for multilayer film
07/18/2000US6090718 Dry etching method for semiconductor substrate
07/18/2000US6090717 Radio frequency to bias chuck and energize electrode; semiconductors
07/18/2000US6090716 Method of fabricating a field effect transistor
07/18/2000US6090715 Masking process for forming self-aligned dual wells or self-aligned field-doping regions
07/18/2000US6090714 Low pressure vapor deposition from ozone and tetraethyl silicate; patterning
07/18/2000US6090713 Shallow trench isolation formation with simplified reverse planarization mask
07/18/2000US6090712 Shallow trench isolation formation with no polish stop
07/18/2000US6090711 Methods for controlling semiconductor workpiece surface exposure to processing liquids
07/18/2000US6090710 Heating, diffusion, alloying; electromigration reduction; corrosion resistance
07/18/2000US6090709 Nitriding from titanium tetrahalide; hydrogen halide or ammonium halide by-product formation
07/18/2000US6090708 Method of forming a crystalline phase material, electrically conductive line and refractory metal silicide
07/18/2000US6090707 Method of forming a conductive silicide layer on a silicon comprising substrate and method of forming a conductive silicide contact
07/18/2000US6090706 Preconditioning process for treating deposition chamber prior to deposition of tungsten silicide coating on active substrates therein
07/18/2000US6090705 Method of eliminating edge effect in chemical vapor deposition of a metal
07/18/2000US6090704 Method for fabricating a high dielectric capacitor
07/18/2000US6090703 Method of forming an integrated circuit having conductors of enhanced cross-sectional area with etch stop barrier layer
07/18/2000US6090702 Embedded electroconductive layer and method for formation thereof
07/18/2000US6090701 Method for production of semiconductor device
07/18/2000US6090700 Metallization method for forming interconnects in an integrated circuit
07/18/2000US6090699 Method of making a semiconductor device
07/18/2000US6090698 Fabrication method for an insulation structure having a low dielectric constant