Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2000
10/03/2000US6127273 Process for anisotropic plasma etching of different substrates
10/03/2000US6127272 Method of electron beam lithography on very high resistivity substrates
10/03/2000US6127271 Process for dry etching and vacuum treatment reactor
10/03/2000US6127270 Methods of forming refractory metal silicide components and methods of restricting silicon surface migration of a silicon structure
10/03/2000US6127269 Method for enhancing sheet resistance uniformity of chemical vapor deposited (CVD) tungsten silicide layers
10/03/2000US6127268 Process for fabricating a semiconductor device with a patterned metal layer
10/03/2000US6127267 Forming first metal film on silicon substrate, overcoating with low stress metal nitride film, then heat treating while excluding nitrogen to form metal silicide interface layer that when deforms is not affected by the metal nitride layer
10/03/2000US6127266 Stabilization of the interface between tiN and A1 alloys
10/03/2000US6127265 Method of manufacturing a semiconductor device with a stacked via
10/03/2000US6127263 Misalignment tolerant techniques for dual damascene fabrication
10/03/2000US6127262 Vapor deposition of protective nitride or oxynitride antireflectivity/antirefractive coating onto first layer coated onto substrate, then coating with photosensitive layer, patterning and etching uppermost layer
10/03/2000US6127261 Method of fabricating an integrated circuit including a tri-layer pre-metal interlayer dielectric compatible with advanced CMOS technologies
10/03/2000US6127260 Method of forming a tee shaped tungsten plug structure to avoid high aspect ratio contact holes in embedded DRAM devices
10/03/2000US6127259 Photolithographically forming contact holes through dielectric layer coated with a bottom antireflective coating (barc), filling holes with metal, polishing surface and removing barc with phosphoric acid
10/03/2000US6127258 Method for forming a semiconductor device
10/03/2000US6127257 Method of making a contact structure
10/03/2000US6127256 Semiconductor device and method of manufacturing the same
10/03/2000US6127255 Semiconductor integrated circuit device, process for fabricating the same, and apparatus for fabricating the same
10/03/2000US6127254 Method and device for precise alignment of semiconductor chips on a substrate
10/03/2000US6127253 Lead-free interconnection for electronic devices
10/03/2000US6127251 Semiconductor device with a reduced width gate dielectric and method of making same
10/03/2000US6127250 Method of increasing package reliability by designing in plane CTE gradients
10/03/2000US6127249 Covering cobalt nitride layer on silicon substrate with titanium cap film, heat treatment to form cobalt silicide by reacting cobalt-containing layer with substrate
10/03/2000US6127248 Selectively doping first region of substrate surrounding first gate structure using an oxidation inhibitor, then further oxidation of dielectric portions around second gate structure in second substrate region to a greater degree
10/03/2000US6127247 Method of eliminating photoresist outgassing in constructing CMOS vertically modulated wells by high energy ion implantation
10/03/2000US6127246 Oxidizing the sides of pillar-shaped laminated structure to form a one-dimensional quantum wire including fine tunnel junctions
10/03/2000US6127245 Grinding technique for integrated circuits
10/03/2000US6127244 Method of manufacturing semiconductor device
10/03/2000US6127243 Method for bonding two wafers
10/03/2000US6127242 Method for semiconductor device isolation using oxygen and nitrogen ion implantations to reduce lateral encroachment
10/03/2000US6127241 Trench isolation structure and fabrication method thereof
10/03/2000US6127240 Rounding tips of concaves and convexes at the rough surface of lower electrode polysilicon film by doping with silicon, then forming dielectric and upper electrode layers
10/03/2000US6127239 Semiconductor processing methods, and methods of forming capacitors
10/03/2000US6127238 Plasma enhanced chemical vapor deposited (PECVD) silicon nitride barrier layer for high density plasma chemical vapor deposited (HDP-CVD) dielectric layer
10/03/2000US6127237 Etching end point detecting method based on junction current measurement and etching apparatus
10/03/2000US6127236 Method of forming a lateral bipolar transistor
10/03/2000US6127235 Method for making asymmetrical gate oxide thickness in channel MOSFET region
10/03/2000US6127234 Ultra shallow extension formation using disposable spacers
10/03/2000US6127233 Lateral MOSFET having a barrier between the source/drain regions and the channel region
10/03/2000US6127232 Disposable gate/replacement gate MOSFETS for sub-0.1 micron gate length and ultra-shallow junctions
10/03/2000US6127231 Method of making transistors in an IC including memory cells
10/03/2000US6127230 Vertical semiconductor device and method of manufacturing the same
10/03/2000US6127229 Process of forming an EEPROM device having a split gate
10/03/2000US6127228 Method of forming buried bit line
10/03/2000US6127227 Thin ONO thickness control and gradual gate oxidation suppression by b. N.su2 treatment in flash memory
10/03/2000US6127226 Method for forming vertical channel flash memory cell using P/N junction isolation
10/03/2000US6127225 Memory cell having implanted region formed between select and sense transistors
10/03/2000US6127224 Process for forming a non-volatile memory cell with silicided contacts
10/03/2000US6127223 Method of fabricating a flash memory cell
10/03/2000US6127222 Non-self-aligned side channel implants for flash memory cells
10/03/2000US6127221 In situ, one step, formation of selective hemispherical grain silicon layer, and a nitride-oxide dielectric capacitor layer, for a DRAM application
10/03/2000US6127220 Manufacturing method for a capacitor in an integrated storage circuit
10/03/2000US6127219 Method of fabricating a semiconductor memory device having a branching capacitor
10/03/2000US6127218 Methods for forming ferroelectric films using dual deposition steps
10/03/2000US6127217 Method of forming highly resistive interconnects
10/03/2000US6127216 Forming integrated circuit field effect transistor which has different threshold voltage but same channel characteristic by excimer laser annealing to activate dopants in a box-like dopant profile
10/03/2000US6127215 Deep pivot mask for enhanced buried-channel PFET performance and reliability
10/03/2000US6127214 Contact gate structure and method
10/03/2000US6127213 Method for simultaneously forming low voltage and high voltage devices
10/03/2000US6127212 Method of forming a CMOS transistor
10/03/2000US6127211 Method of manufacturing transistor
10/03/2000US6127210 Manufacturing method of CMOS thin film semiconductor device and CMOS thin film semiconductor device manufactured thereby
10/03/2000US6127209 Semiconductor device and method of manufacturing the same
10/03/2000US6127208 Method of manufacturing semiconductor IC
10/03/2000US6127207 Semiconductor integrated circuit and fabrication method therefor
10/03/2000US6127203 Thermoplastic mounting of a semiconductor die to a substrate having a mismatched coefficient of thermal expansion
10/03/2000US6127202 Heating and reduction of group group ib, iiia or mixed oxides to form non-oxide precursor film of these metals, reacting with group via source to form final intermetallic ib-iiia-via film for efficient photoelectric cell
10/03/2000US6127201 Masking and dry etching an epitaxially grown compound semiconductor layer to form ridge stripes using an etching plasma gas comprising a halogen and nitrogen, then burying ridge stripes with compound semiconductor
10/03/2000US6127199 Manufacturing method of active matrix substrate, active matrix substrate and liquid crystal display device
10/03/2000US6127197 Method for measuring width of wire in semiconductor device using measuring-pattern
10/03/2000US6127195 Methods of forming an apparatus for engaging electrically conductive pads and method of forming a removable electrical interconnect apparatus
10/03/2000US6127193 Test structure used to measure metal bottom coverage in trenches and vias/contacts and method for creating the test structure
10/03/2000US6127192 Complexes having tris (pyrazolyl) borate ligands for forming films
10/03/2000US6127101 Alkylated aminoalkylpiperazine surfactants and their use in photoresist developers
10/03/2000US6127099 Method of producing a semiconductor device
10/03/2000US6127096 Method for reducing photolithographic steps in a semiconductor interconnect process
10/03/2000US6127095 Device comprising light source for supplying light, condenser optical system which includes decentering unit for collecting light and guiding onto object, secondary light source between light source and optical system which varies shape or size
10/03/2000US6127091 Photopolymerizable composition and photopolymerizable recording material prepared using this composition
10/03/2000US6127089 Interconnect structure with low k dielectric materials and method of making the same with single and dual damascene techniques
10/03/2000US6127086 Photosensitive resin compositions
10/03/2000US6127070 Thin resist with nitride hard mask for via etch application
10/03/2000US6127068 X-ray membrane for x-ray mask, x-ray mask blank, x-ray mask, manufacturing method thereof and method of polishing silicon carbide film
10/03/2000US6127040 Electroceramic component and method of manufacture thereof
10/03/2000US6127004 Providing substrate having top surface coating with material including anode having indium-tin-oxide; forming amorphous conductive layer over anode by applying radio frequency field across fluorocarbon gas to deposit fluorocarbon polymer layer
10/03/2000US6126998 Process for producing a ceramic layer containing Bi
10/03/2000US6126996 Metal complex source reagents for chemical vapor deposition
10/03/2000US6126994 Liquid material supply apparatus and method
10/03/2000US6126989 Copper electroless deposition on a titanium-containing surface
10/03/2000US6126885 Adhering sealing sheet to lead frame by vacuum suction; encapsulation with molding compound; filling concave portions
10/03/2000US6126853 Comprising a film forming agent, urea hydrogen peroxide, a complexing agent, an abrasive, and an optional surfactant for removing copper alloy, titanium, and titanium nitride containing layers from substrate
10/03/2000US6126848 Indirect endpoint detection by chemical reaction and chemiluminescence
10/03/2000US6126847 High selectivity etching process for oxides
10/03/2000US6126806 Laminating impurity and other additives to form intermetallic barrier to suppress metal grain boundary growth and metal surface mobility of a composite copper film
10/03/2000US6126791 Target for use in magnetron sputtering of aluminum for forming metallization films having low defect densities and methods for manufacturing and using such target
10/03/2000US6126761 Process of controlling grain growth in metal films
10/03/2000US6126752 Semiconductor device having capacitor and manufacturing apparatus thereof
10/03/2000US6126740 Solution synthesis of mixed-metal chalcogenide nanoparticles and spray deposition of precursor films
10/03/2000US6126733 Alcohol based precursors for producing nanoporous silica thin films
10/03/2000US6126725 Deaerating apparatus and treatment apparatus with gas permeable films
10/03/2000US6126703 Tables laid one on top of the other and can move up and down and stop at specific height, the first table allows substrate to be transfered to an external exposure machine, second table for receiving it from the machine; semiconductors
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