Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2000
10/04/2000EP0654174B1 Sealed conductive active alloy feedthroughs
10/04/2000EP0651693B1 Method and apparatus for separating circuit dies from a wafer
10/04/2000CN2399828Y Improved large current resistance semiconductor device
10/04/2000CN1269054A Bipolar power transistors and mfg. method
10/04/2000CN1269028A Interface circuit for full-custom and semi-custom timing domains
10/04/2000CN1268967A Method for preparing metallic oxides sludge for chemical mechanical polishing for semiconductor
10/04/2000CN1268925A Three-D structure memory
10/04/2000CN1268905A Laminated assembly for active bioelectronic device
10/04/2000CN1268772A High performance dynamic random access memory, and method for mfg. same
10/04/2000CN1268770A Processing art for forming semiconductor device
10/04/2000CN1268769A Substrate element and soft substrate
10/04/2000CN1268768A Method for making semi-conductor device
10/04/2000CN1268681A Improved critical dimension control
10/04/2000CN1268679A Chemical enhancement type photoetching gum
10/04/2000CN1268678A Method for improving etching-resistance ability of photoetching gum
10/04/2000CN1057171C Low voltage one transistor flash EEPROM cell
10/03/2000USRE36890 Gradient chuck method for wafer bonding employing a convex pressure
10/03/2000US6128767 Polygon representation in an integrated circuit layout
10/03/2000US6128756 System for optimizing the testing and repair time of a defective integrated circuit
10/03/2000US6128403 Wafer map analysis aid system, wafer map analyzing method and wafer processing method
10/03/2000US6128363 X-ray mask blank, x-ray mask, and pattern transfer method
10/03/2000US6128239 MRAM device including analog sense amplifiers
10/03/2000US6128231 Nonvolatile semiconductor memory device capable of optimizing program time
10/03/2000US6128230 Semiconductor memory with PN junction potential reduction in a writing mode
10/03/2000US6128223 Semiconductor memory device
10/03/2000US6128216 High density planar SRAM cell with merged transistors
10/03/2000US6128212 Metal ferroelectric silicon field effect transistor memory
10/03/2000US6128209 Semiconductor memory device having dummy bit and word lines
10/03/2000US6128208 Semiconductor device
10/03/2000US6128201 Three dimensional mounting assembly for integrated circuits
10/03/2000US6128178 Very thin film capacitor for dynamic random access memory (DRAM)
10/03/2000US6128173 Semiconductor integrated circuit device having protective transistors with P-N junction broken down earlier than breakdown of gate insulator of component transistors
10/03/2000US6128084 Evaluation method of semiconductor layer, method for fabricating semiconductor device, and storage medium
10/03/2000US6128074 Method and apparatus for inspection of pin grid array packages for bent leads
10/03/2000US6128067 Correcting method and correcting system for mask pattern
10/03/2000US6128052 Semiconductor device applicable for liquid crystal display device, and process for its fabrication
10/03/2000US6128030 Semiconductor exposure device
10/03/2000US6127883 Semiconductor device capable of mirror-symmetrically inverting input/output pin-signal allocation
10/03/2000US6127874 Skew adjustable IC and a method for designing the same
10/03/2000US6127852 Semiconductor integrated circuit for parallel signal processing
10/03/2000US6127845 Field programmable gate array having internal logic transistors with two different gate insulator thicknesses
10/03/2000US6127838 IDDQ testable programmable logic arrays
10/03/2000US6127837 Method of testing semiconductor devices
10/03/2000US6127831 Method of testing a semiconductor device by automatically measuring probe tip parameters
10/03/2000US6127794 Magnetic recording/reproducing apparatus and semiconductor integrated circuit device for driving it
10/03/2000US6127749 Two-dimensional electric motor
10/03/2000US6127738 Detecting registration marks with low energy electron beam
10/03/2000US6127737 Semiconductor device and manufacturing method thereof
10/03/2000US6127736 Microbump interconnect for semiconductor dice
10/03/2000US6127735 Interconnect for low temperature chip attachment
10/03/2000US6127734 Semiconductor device comprising a contact hole of varying width thru multiple insulating layers
10/03/2000US6127733 Check pattern for via-hole opening examination
10/03/2000US6127732 Semiconductor device having high aspect ratio contacts
10/03/2000US6127731 Capped solder bumps which form an interconnection with a tailored reflow melting point
10/03/2000US6127730 Composite metal films for severe topology interconnects
10/03/2000US6127729 Semiconductor chip with corner electrode terminals and detecting wiring for defect inspection
10/03/2000US6127725 Thin film electronics on insulator on metal
10/03/2000US6127721 Soft passivation layer in semiconductor fabrication
10/03/2000US6127720 Semiconductor device and method for manufacturing the same
10/03/2000US6127719 Subfield conductive layer and method of manufacture
10/03/2000US6127718 Semiconductor device and method of manufacturing the same
10/03/2000US6127717 Totally self-aligned transistor with polysilicon shallow trench isolation
10/03/2000US6127714 Method for producing semiconductor device and photodetector device
10/03/2000US6127712 Mosfet with buried contact and air-gap gate structure
10/03/2000US6127711 Semiconductor device having plural air gaps for decreasing parasitic capacitance
10/03/2000US6127710 CMOS structure having a gate without spacers
10/03/2000US6127709 Guard ring structure for semiconductor devices and process for manufacture thereof
10/03/2000US6127708 Semiconductor device having an intervening region between channel stopper and diffusion region
10/03/2000US6127707 Semiconductor device and method of fabricating the same
10/03/2000US6127706 Trench-free buried contact for SRAM devices
10/03/2000US6127705 Static random access memory cell suitable for high integration density and cell stabilization
10/03/2000US6127704 Structure of SRAM cell and method for fabricating the same
10/03/2000US6127702 Semiconductor device having an SOI structure and manufacturing method therefor
10/03/2000US6127700 Field-effect transistor having local threshold-adjust doping
10/03/2000US6127699 Method for fabricating MOSFET having increased effective gate length
10/03/2000US6127698 High density/speed nonvolatile memories with a textured tunnel oxide and a high capacitive-coupling ratio
10/03/2000US6127696 High voltage MOS transistor for flash EEPROM applications having a uni-sided lightly doped drain
10/03/2000US6127695 Lateral field effect transistor of SiC, a method for production thereof and a use of such a transistor
10/03/2000US6127694 Semiconductor wafer and method of manufacturing the same, and semiconductor device and test board of the same
10/03/2000US6127686 Thin resist process by sub-threshold exposure
10/03/2000US6127658 Wafer heating apparatus and method with radiation absorptive peripheral barrier blocking stray radiation
10/03/2000US6127634 Wiring board with an insulating layer to prevent gap formation during etching
10/03/2000US6127629 Hermetically sealed microelectronic device and method of forming same
10/03/2000US6127623 Solar cell and production process therefor
10/03/2000US6127620 Converging solar module
10/03/2000US6127289 Method for treating semiconductor wafers with corona charge and devices using corona charging
10/03/2000US6127288 Method of thermally processing semiconductor wafer
10/03/2000US6127287 Silicon nitride deposition method for use in forming a memory cell dielectric
10/03/2000US6127286 Apparatus and process for deposition of thin film on semiconductor substrate while inhibiting particle formation and deposition
10/03/2000US6127285 Interlevel dielectrics with reduced dielectric constant
10/03/2000US6127284 Method of manufacturing a semiconductor device having nitrogen-bearing oxide gate insulating layer
10/03/2000US6127282 Method for removing copper residue from surfaces of a semiconductor wafer
10/03/2000US6127281 Porous region removing method and semiconductor substrate manufacturing method
10/03/2000US6127280 Photoelectrochemical capacitance-voltage measurements of wide bandgap semiconductors
10/03/2000US6127279 Solution applying method
10/03/2000US6127278 Etch process for forming high aspect ratio trenched in silicon
10/03/2000US6127277 Method and apparatus for etching a semiconductor wafer with features having vertical sidewalls
10/03/2000US6127276 Method of formation for a via opening
10/03/2000US6127275 Process depending on plasma discharges sustained by inductive coupling
10/03/2000US6127274 Process for producing electronic devices