Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
04/2001
04/05/2001WO2001024239A1 Integrated circuit plating using highly-complexed copper plating baths
04/05/2001WO2001024238A1 Method for forming tungsten silicide film and method for fabricating metal-insulator-semiconductor transistor
04/05/2001WO2001024237A1 Integrated circuits with barrier layers and methods of fabricating same
04/05/2001WO2001024236A1 Semiconductor structures having a capacitor and manufacturing methods
04/05/2001WO2001024235A2 Methods and apparatuses for trench depth detection and control
04/05/2001WO2001024234A2 A method for cleaning and treating a semiconductor wafer after chemical mechanical polishing
04/05/2001WO2001024233A1 Wafer atmospheric transport module having a controlled mini-environment
04/05/2001WO2001024232A1 A method and system for reducing photo-assisted corrosion in wafers during cleaning processes
04/05/2001WO2001024231A2 Apparatus and method for providing mechanically pre-formed conductive leads
04/05/2001WO2001024230A2 Techniques for improving etching in a plasma processing chamber
04/05/2001WO2001024227A2 IMPROVED PECVD AND CVD PROCESSES FOR WNx DEPOSITION
04/05/2001WO2001024221A1 Voltage control sensor and control interface for radio frequency power regulation in a plasma reactor
04/05/2001WO2001024216A2 Pretreated gas distribution plate
04/05/2001WO2001024190A1 Polyvalent, magnetoresistive write/read memory and method for writing and reading a memory of this type
04/05/2001WO2001024187A1 Dynamic random access memory
04/05/2001WO2001024186A1 Capacitive sensing array devices
04/05/2001WO2001024066A1 A regionally time multiplexed emulation system
04/05/2001WO2001023961A1 Method and apparatus for determining phase shifts and trim masks for an integrated circuit
04/05/2001WO2001023898A1 Method of manufacturing semiconductor inspection
04/05/2001WO2001023871A1 Method and apparatus for characterization of microelectronic feature quality
04/05/2001WO2001023838A1 Tuning fork gyroscope
04/05/2001WO2001023830A1 Method and apparatus for in-situ monitoring of plasma etch and deposition processes using a pulsed broadband light source
04/05/2001WO2001023649A1 Wafer, epitaxial filter, and method of manufacture thereof
04/05/2001WO2001023648A1 Apparatus and method for forming single crystalline nitride substrate using hydride vapor phase epitaxy and laser beam
04/05/2001WO2001023636A1 Method and apparatus for controlling chamber surfaces in a semiconductor processing reactor
04/05/2001WO2001023486A1 Compositions for and methods of reducing/eliminating scratches and defects in silicon dioxide cmp process
04/05/2001WO2001023190A1 Method and compositions for printing substrates
04/05/2001WO2001023141A1 Polishing pad
04/05/2001WO2001023139A1 Polishing pad treatment for surface conditioning
04/05/2001WO2001023138A1 Wafer grinder
04/05/2001WO2001023132A1 Laser system
04/05/2001WO2001023130A1 Atmospheric process and system for controlled and rapid removal of polymers from high depth to width aspect ratio holes
04/05/2001WO2000068975A3 System for manufacturing semiconductor products
04/05/2001WO2000068974A3 System for processing wafers
04/05/2001WO2000067311A3 Method for producing a wafer support in a high-temperature cvd reactor
04/05/2001WO2000063966A3 Method for planarized deposition of a material
04/05/2001WO2000055593A3 Sensor
04/05/2001US20010000166 Apparatus and method for feeding slurry
04/05/2001US20010000159 Method of fabricating a semiconductor insulation layer
04/05/2001US20010000158 Silicide glue layer for W-CVD plug application
04/05/2001US20010000157 Semiconductor device and method of making the same
04/05/2001US20010000156 Package board structure and manufacturing method thereof
04/05/2001US20010000155 Etching holes in a patterned cap insulation layer which is on a masking layer covering a dielectric layer on a wiring layer to form an opening aligned with the wiring layer; etching to expose wire; filling with conductor; low dielectric constant
04/05/2001US20010000154 Thin film type monolithic semiconductor device
04/05/2001US20010000153 An electrically programmable, read-only memory device having efficient electron injection from channel to floating gate; between source and drain regions, a floating gate is over a small enhanced mode channel and N region; low voltage
04/05/2001US20010000152 Strain release contact system for integrated circuits
04/05/2001US20010000122 System to minimize the temperature coefficient of resistance of passive resistors in an integrated circuit process flow
04/05/2001US20010000116 Semiconductor device
04/05/2001US20010000115 Dual damascene flowable oxide insulation structure and metallic barrier
04/05/2001US20010000114 Semiconductor device with wiring layer of low resistance
04/05/2001US20010000113 Vertical double diffused MOSFET and method for manufacturing same
04/05/2001US20010000111 Field effect transistor having dielectrically isolated sources and drains and method for making same
04/05/2001US20010000104 Perforated plasma confinement ring in plasma reactors
04/05/2001US20010000098 Equipment for UV wafer heating and photochemistry
04/05/2001US20010000093 Silicon single crystal wafer and a method for producing it
04/05/2001DE19959345C1 Encapsulation of sensor on carrier chip, e.g. ion-selective or optical sensor, involves applying fluid in thinner layer on active sensor area than surrounding area, solidification and chemical machining to expose active area
04/05/2001DE19946712A1 Verfahren und Zusammensetzungen zum Bedrucken von Substraten Methods and compositions for printing substrates
04/05/2001DE19946645A1 Method of recovering or reworking electrostatic retaining devices, such as E-chucks for semiconductor wafer processing, involves removing foil system from electrostatic retainer
04/05/2001DE19946195C1 Removal of alumina particle layer sintered onto sintered multilayer ceramic substrate, employs two stages of dry grit blasting followed by electrostatic repulsion of submicron residue
04/05/2001DE19944304A1 Semiconductor structure with multiple metallic layer depositions
04/05/2001DE19943521A1 Process for adjusting the defined flank angle comprises influencing the flank angle by producing or adjusting defined joint stresses in the layer to be structured whilst a metal or metal oxide layer is deposited
04/05/2001DE19943114A1 MOS-Transistor und Verfahren zu dessen Herstellung MOS transistor and method of producing the
04/05/2001DE19943101A1 Bonded semiconductor wafer comprises a substrate wafer and a high performance wafer made of a semiconductor material of a defined thickness achieved by removing the high performance wafer by a single crystal
04/05/2001DE19942680A1 Integrierte Schaltungsanordnung mit mindestens einem Kondensator und Verfahren zu deren Herstellung Integrated circuit arrangement with at least one capacitor and process for their preparation
04/05/2001DE19942679C1 Verfahren zum Herstellen eines hochvolttauglichen Randabschlusses bei einem nach dem Prinzip der lateralen Ladungskompensation vorgefertigten Grundmaterialwafer A method for producing a high-voltage edge termination suitable for a pre-made according to the principle of lateral charge compensation base material wafer
04/05/2001DE19940564A1 Chipkartenmodul und diesen umfassende Chipkarte, sowie Verfahren zur Herstellung des Chipkartenmoduls Chip card module and this comprehensive chip card, and processes for producing the smart card module
04/05/2001DE19940381A1 Ferroelektrischer Transistor und Verfahren zu dessen Herstellung Ferroelectric transistor and method of producing the
04/05/2001DE19934300A1 Vorrichtung zum Behandeln von Substraten Apparatus for processing substrates
04/05/2001DE19929306A1 Verfahren zur Herstellung einer strukturierten Edelmetallschicht A method for producing a structured layer of precious metal
04/05/2001DE10047659A1 Epitaxial stacking structure comprises a buffer layer formed on a single crystalline substrate made of gallium arsenide, a channel layer and an electron feed layer
04/05/2001DE10045340A1 Semiconductor structure used in sensors comprises a deformable crosspiece arrangement on a substrate
04/05/2001DE10045043A1 Semiconductor component used in e.g. mobile phone, mobile information unit, has intermediate connection which couples electrodes on semiconductor component to connection electrodes of resin component
04/05/2001DE10039173A1 Semiconductor device with bipolar transistor, has emitter and base contact regions which are separated by preset gap, so that current amplification factor of transistor is within specific range
04/05/2001DE10034309A1 Boundary layer voltage reducing device for IC package, has ring portion with high thermal coefficient and opening having form and size corresponding to external perimeter of IC at given temperature
04/05/2001DE10031952A1 Mehrchip-Halbleitermodul und Herstellungsverfahren dafür A multi-chip semiconductor module, and manufacturing method thereof
04/05/2001DE10026187A1 Verfahren und Vorrichtung zum Herstellen einer elektronischen Komponente Method and apparatus for manufacturing an electronic component
04/05/2001DE10025209A1 Halbleitereinrichtung Semiconductor device
04/05/2001DE10021344A1 Semiconductor device provided with semiconductor chip, has semiconductor circuit and circuit elements respectively formed on front and back surface of semiconductor chip
04/05/2001DE10017090A1 Field effect semiconductor device used as a field effect transistor of the MOS type comprises a stacked gate insulating film and a gate electrode on one surface of a semiconductor layer
04/05/2001DE10013655A1 Semiconductor device with digital and analog circuits in a chip has interface circuit that transmits signal between internal circuits when operated by voltages laid by third high and low-potential connections
04/05/2001DE10006643A1 Statische Halbleiterspeichereinrichtung The static semiconductor memory device
04/05/2001CA2386133A1 Method of forming smooth morphologies in inp-based semiconductors
04/05/2001CA2352131A1 Tuning fork gyroscope
04/04/2001EP1089347A2 Method and apparatus for automatically soldering a lead wire to a solar battery
04/04/2001EP1089344A2 Insulated gate field effect transistor and method of fabricating the same
04/04/2001EP1089343A2 Semiconductor device with trench gate
04/04/2001EP1089341A2 Non-volatile memory
04/04/2001EP1089340A2 EPROM structure for semiconductor memory
04/04/2001EP1089339A2 Ferroelectric capacitor and ferrroelectric memory
04/04/2001EP1089338A2 CMOS circuit of GaAs/Ge on Si substrate
04/04/2001EP1089337A1 Semiconductor device
04/04/2001EP1089335A1 Semiconductor device
04/04/2001EP1089332A2 Method for the manufacture of a CMOS-integrated memory
04/04/2001EP1089331A2 Flip chip technology using electrically conductive polymers and dieletrics
04/04/2001EP1089330A2 Lateral field effect transistor
04/04/2001EP1089329A1 Production methods of compound semiconductor single crystal and compound semiconductor element
04/04/2001EP1089328A1 Method for manufacturing of a semiconductor device
04/04/2001EP1089326A2 Wafer support with a dustproof covering film and method for producing the same
04/04/2001EP1089325A2 Support frame for substrates
04/04/2001EP1089318A1 Method for determining the endpoint of etch process steps