| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 04/24/2001 | US6221766 Method and apparatus for processing refractory metals on semiconductor substrates |
| 04/24/2001 | US6221765 Method for manufacturing a semiconductor device |
| 04/24/2001 | US6221764 Manufacturing method of semiconductor device |
| 04/24/2001 | US6221763 Method of forming a metal seed layer for subsequent plating |
| 04/24/2001 | US6221762 Method for fabricating semiconductor device having improved step coverage and low resistivity contacts |
| 04/24/2001 | US6221761 Method of stabilizing anti-reflection coating layer |
| 04/24/2001 | US6221760 Semiconductor device having a silicide structure |
| 04/24/2001 | US6221759 Method for forming aligned vias under trenches in a dual damascene process |
| 04/24/2001 | US6221758 Effective diffusion barrier process and device manufactured thereby |
| 04/24/2001 | US6221757 Method of making a microelectronic structure |
| 04/24/2001 | US6221756 Method of forming interlayer film |
| 04/24/2001 | US6221755 Film formation method and manufacturing method of semiconductor device |
| 04/24/2001 | US6221754 Method of fabricating a plug |
| 04/24/2001 | US6221753 Flip chip technique for chip assembly |
| 04/24/2001 | US6221752 Method of mending erosion of bonding pad |
| 04/24/2001 | US6221750 Fabrication of deformable leads of microelectronic elements |
| 04/24/2001 | US6221749 Semiconductor device and production thereof |
| 04/24/2001 | US6221748 Apparatus and method for providing mechanically pre-formed conductive leads |
| 04/24/2001 | US6221747 Method of fabricating a conductive plug with a low junction resistance in an integrated circuit |
| 04/24/2001 | US6221746 Method for forming a poly gate structure |
| 04/24/2001 | US6221745 High selectivity mask oxide etching to suppress silicon pits |
| 04/24/2001 | US6221744 Method for forming a gate |
| 04/24/2001 | US6221743 Method for processing substrate |
| 04/24/2001 | US6221742 Method for fabricating polysilicon film for semiconductor device |
| 04/24/2001 | US6221741 Process of fabricating a semiconductor substrate with semi-insulating polysilicon gettering site layer |
| 04/24/2001 | US6221740 Substrate cleaving tool and method |
| 04/24/2001 | US6221739 Method for bonding single crystal membranes to a curved surface |
| 04/24/2001 | US6221738 Substrate and production method thereof |
| 04/24/2001 | US6221737 Method of making semiconductor devices with graded top oxide and graded drift region |
| 04/24/2001 | US6221736 Fabrication method for a shallow trench isolation structure |
| 04/24/2001 | US6221735 Method for eliminating stress induced dislocations in CMOS devices |
| 04/24/2001 | US6221734 Method of reducing CMP dishing effect |
| 04/24/2001 | US6221733 Reduction of mechanical stress in shallow trench isolation process |
| 04/24/2001 | US6221732 Method of producing semiconductor device |
| 04/24/2001 | US6221731 Process of fabricating buried diffusion junction |
| 04/24/2001 | US6221730 Fabrication method of semiconductor device with HSG configuration |
| 04/24/2001 | US6221728 Semiconductor device manufacturing method |
| 04/24/2001 | US6221727 Method to trap air at the silicon substrate for improving the quality factor of RF inductors in CMOS technology |
| 04/24/2001 | US6221726 Process for fabricating device structures for real-time process control of silicon doping |
| 04/24/2001 | US6221725 Method of fabricating silicide layer on gate electrode |
| 04/24/2001 | US6221724 Method of fabricating an integrated circuit having punch-through suppression |
| 04/24/2001 | US6221723 Method of setting threshold voltage levels of a multiple-valued mask programmable read only memory |
| 04/24/2001 | US6221722 Method of fabricating mask ROM |
| 04/24/2001 | US6221721 Method of manufacturing an insulated trench gate semiconductor device |
| 04/24/2001 | US6221720 Method of making an electronic device and the same |
| 04/24/2001 | US6221719 Process for the manufacturing of a DMOS-technology transistor providing for a single thermal process for the formation of source and body regions |
| 04/24/2001 | US6221718 Method of fabricating a flash memory |
| 04/24/2001 | US6221717 EEPROM memory cell comprising a selection transistor with threshold voltage adjusted by implantation, and related manufacturing process |
| 04/24/2001 | US6221716 Method of manufacturing a flash memory device |
| 04/24/2001 | US6221715 Method of making polysilicon self-aligned to field isolation oxide |
| 04/24/2001 | US6221714 Method of forming a contact hole in a semiconductor substrate using oxide spacers on the sidewalls of the contact hole |
| 04/24/2001 | US6221713 Approach for self-aligned contact and pedestal |
| 04/24/2001 | US6221712 Method for fabricating gate oxide layer |
| 04/24/2001 | US6221711 Methods of electrically contacting to conductive plugs, methods of forming contact openings, and methods of forming dynamic random access memory circuitry |
| 04/24/2001 | US6221710 Method of fabricating capacitor |
| 04/24/2001 | US6221709 Method of fabricating a CMOS integrated circuit device with LDD N-channel transistor and non-LDD P-channel transistor |
| 04/24/2001 | US6221708 Field effect transistor assemblies, integrated circuitry, and methods of forming field effect transistors and integrated circuitry |
| 04/24/2001 | US6221707 Method for fabricating a transistor having a variable threshold voltage |
| 04/24/2001 | US6221706 Aluminum disposable spacer to reduce mask count in CMOS transistor formation |
| 04/24/2001 | US6221705 Method for improving performance and reliability of MOS technologies and data retention characteristics of flash memory cells |
| 04/24/2001 | US6221704 Process for fabricating short channel field effect transistor with a highly conductive gate |
| 04/24/2001 | US6221703 Method of ion implantation for adjusting the threshold voltage of MOS transistors |
| 04/24/2001 | US6221702 Method of fabricating thin film transistor |
| 04/24/2001 | US6221701 Insulated gate field effect transistor and its manufacturing method |
| 04/24/2001 | US6221700 Method of manufacturing silicon carbide semiconductor device with high activation rate of impurities |
| 04/24/2001 | US6221698 Process for making high density mask ROM |
| 04/24/2001 | US6221696 Process for improving the adhesion between metal and plastic in containment structures for electronic semiconductor devices |
| 04/24/2001 | US6221694 Method of making a circuitized substrate with an aperture |
| 04/24/2001 | US6221693 High density flip chip BGA |
| 04/24/2001 | US6221692 Method of fabricating solder-bearing silicon semiconductor device and circuit board mounted therewith |
| 04/24/2001 | US6221691 Method and system for attaching semiconductor dice to substrates |
| 04/24/2001 | US6221690 Semiconductor package and production method thereof |
| 04/24/2001 | US6221689 Method for improving the reliability of underfill process for a chip |
| 04/24/2001 | US6221688 Diode and method for manufacturing the same |
| 04/24/2001 | US6221686 Method of making a semiconductor image sensor |
| 04/24/2001 | US6221685 Method of producing photovoltaic element |
| 04/24/2001 | US6221682 Method and apparatus for evaluating a known good die using both wire bond and flip-chip interconnects |
| 04/24/2001 | US6221681 On-chip misalignment indication |
| 04/24/2001 | US6221680 Patterned recess formation using acid diffusion |
| 04/24/2001 | US6221567 Disposing etch mask over polymeric acid layer, exposing polymeric acid layer to etchant solutions and to rinse solutions in alternating manner such that polymeric acid layer undergoes at least two etchant and two rinse exposures |
| 04/24/2001 | US6221564 Forming gate on semiconductor wafer over a defined active area, doping source/drain regions, coating gate and wafer with uniform layer of photosensitive material suitable for use as spacer alongside gate, forming silicide |
| 04/24/2001 | US6221562 Resist image reversal by means of spun-on-glass |
| 04/24/2001 | US6221560 Layer of oxide is deposited and profiled by positive tone imaging, layer of plasma polymerized methylsilane is deposited using mask of starting structure, layer is exposed, unexposed polymer is removed, exposed regions planarized |
| 04/24/2001 | US6221558 Anti-reflection oxynitride film for polysilicon substrates |
| 04/24/2001 | US6221553 Contacting receptor with thermal transfer element having substrate and transfer layer, transfer layer including multicomponent transfer unit, selectively heating transfer element to transfer multicomponent transfer unit to receptor |
| 04/24/2001 | US6221541 Photolithography; preparing masks having segment patterns corresponding to fan-shapes particularly suitable for manufacture of a diffractive optical element for use in an optical system |
| 04/24/2001 | US6221540 Marking; illuminating grid with light source |
| 04/24/2001 | US6221539 Mask pattern correction method and a recording medium which records a mask pattern correction program |
| 04/24/2001 | US6221503 Electrode modification using an unzippable polymer paste |
| 04/24/2001 | US6221440 Process for plating metal coating |
| 04/24/2001 | US6221427 Interface regions between metal and ceramic in a metal/ceramic substrate |
| 04/24/2001 | US6221229 Connecting regions that can be soldered and/or bonded, metallization by laser to form a conductive pattern applying electrolysis resistant coating |
| 04/24/2001 | US6221221 Apparatus for providing RF return current path control in a semiconductor wafer processing system |
| 04/24/2001 | US6221205 Apparatus for improving the performance of a temperature-sensitive etch |
| 04/24/2001 | US6221204 Stackable chamber apparatus |
| 04/24/2001 | US6221203 Apparatus and method for controlling temperature of a chamber |
| 04/24/2001 | US6221201 Method of holding substrate and substrate holding system |
| 04/24/2001 | US6221200 Instrument for production of semiconductor device and process for production thereof |
| 04/24/2001 | US6221193 Defect reduction method for screened greensheets and article produced therefrom |
| 04/24/2001 | US6221174 Forming seed layer of titanium nitride (tin) upon titanium (ti) film from thermal reaction between titanium tetrachloride (ticl.sub.4) and ammonia (nh.sub.3) |