Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2001
05/01/2001US6226187 Integrated circuit package
05/01/2001US6226171 Power conducting substrates with high-yield integrated substrate capacitor
05/01/2001US6226133 Optical apparatus and a method of transporting the same
05/01/2001US6226128 Light-transmitting optical member, manufacturing method thereof, evaluation method therefor, and optical lithography apparatus using the optical member
05/01/2001US6226079 Defect assessing apparatus and method, and semiconductor manufacturing method
05/01/2001US6226075 Supporting device provided with a gas spring with a gas bearing, and lithographic device provided with such supporting devices
05/01/2001US6226074 Exposure monitor mask, exposure adjusting method and method of manufacturing semiconductor devices
05/01/2001US6226073 Stage system with driving mechanism, and exposure apparatus having the same
05/01/2001US6226072 Stage system and exposure apparatus with the same
05/01/2001US6226059 Active matrix display device using aluminum alloy in scanning signal line or video signal line
05/01/2001US6226057 Liquid crystal display having overlapped pixel electrodes and method for fabricating the same
05/01/2001US6225860 Source voltage detecting circuit
05/01/2001US6225858 Performance driven multi-valued variable supply voltage scheme for low power design of VLSI circuits and systems
05/01/2001US6225854 Voltage boosting circuit having cross-coupled precharge circuits
05/01/2001US6225853 Booster circuit
05/01/2001US6225836 Semiconductor integrated circuit device capable of altering an operating mode by an electrical input applied from outside product package
05/01/2001US6225818 Integrated circuits including function identification circuits having operating modes that identify corresponding functions of the integrated circuits
05/01/2001US6225816 Split resistor probe and method
05/01/2001US6225815 Charged particle beam test system
05/01/2001US6225798 Semiconductor device tester
05/01/2001US6225704 Flip-chip type semiconductor device
05/01/2001US6225702 Ball grid array to prevent shorting between a power supply and ground terminal
05/01/2001US6225698 Method for making semiconductor devices having gradual slope contacts
05/01/2001US6225697 Semiconductor device and method for manufacturing the same
05/01/2001US6225695 Grooved semiconductor die for flip-chip heat sink attachment
05/01/2001US6225692 Flip chip package for micromachined semiconductors
05/01/2001US6225686 Semiconductor device
05/01/2001US6225682 Semiconductor memory device having isolation structure and method of fabricating the same
05/01/2001US6225680 Semiconductor structure based on silicon carbide material, with a plurality electrically different partial regions
05/01/2001US6225677 Inductance device formed on semiconductor substrate
05/01/2001US6225676 Semiconductor device with improved inter-element isolation
05/01/2001US6225675 Integrated circuitry, methods of fabricating integrated circuitry, methods of forming local interconnects, and methods of forming conductive lines
05/01/2001US6225674 Semiconductor structure and method of manufacture
05/01/2001US6225673 Integrated circuit which minimizes parasitic action in a switching transistor pair
05/01/2001US6225671 Method of reducing defects in anti-reflective coatings and semiconductor structures fabricated thereby
05/01/2001US6225669 Non-uniform gate/dielectric field effect transistor
05/01/2001US6225666 Low stress active area silicon island structure with a non-rectangular cross-section profile and method for its formation
05/01/2001US6225665 Semiconductor device having multiple source regions
05/01/2001US6225664 Dielectrically isolated IC driver having upper-side and lower-side arm drivers and power IC having the same
05/01/2001US6225663 Semiconductor device having SOI structure and method of fabricating the same
05/01/2001US6225661 MOS transistor with stepped gate insulator
05/01/2001US6225660 Single poly EPLD cell and its fabricating method
05/01/2001US6225659 Trenched gate semiconductor device and method for low power applications
05/01/2001US6225658 Semiconductor device manufacture method and semiconductor device comprising capacitor and MISFET
05/01/2001US6225657 Semiconductor device and method for manufacturing thereof
05/01/2001US6225656 Ferroelectric integrated circuit with protective layer incorporating oxygen and method for fabricating same
05/01/2001US6225655 Ferroelectric transistors using thin film semiconductor gate electrodes
05/01/2001US6225654 Static ferrolectric memory transistor having improved data retention
05/01/2001US6225651 Structure with a micro-electronic component made of a semi-conductor material difficult to etch and with metallized holes
05/01/2001US6225650 Comprises a base substrate, a mask layer, and a gallium nitride group crystal layer grown to cover the mask layer; allows growth of a gallium nitride group crystal in the c axis orientation
05/01/2001US6225646 Integrated circuit incorporating a memory cell and a transistor elevated above an insulating base
05/01/2001US6225645 Semiconductor device and method of manufacturing the same
05/01/2001US6225644 Semiconductor TFT, producing method thereof, semiconductor TFT array substrate and liquid crystal display using the same
05/01/2001US6225643 SOI cell and method for producing it
05/01/2001US6225639 Method of monitoring a patterned transfer process using line width metrology
05/01/2001US6225626 Through-the-substrate investigation of flip chip IC's
05/01/2001US6225625 Signal detection methods and apparatus
05/01/2001US6225616 Solid-state image pickup devices having source follower buffer circuits therein with actively controlled gain characteristics
05/01/2001US6225602 Vertical furnace for the treatment of semiconductor substrates
05/01/2001US6225601 Heating a substrate support in a substrate handling chamber
05/01/2001US6225594 Method and apparatus for securing components of wafer processing fixtures
05/01/2001US6225558 Chip size semiconductor package and fabrication method thereof
05/01/2001US6225476 Acrylic ester compound having alkoxycarbonyl group or group derived from molecule of lactone compound by removing hydrogen atom bonded to carbon atom; monomer of film-forming resin
05/01/2001US6225433 Curable silicone composition and electronic components
05/01/2001US6225379 Epoxy resin composition for bonding semiconductor chips
05/01/2001US6225241 Catalytic deposition method for a semiconductor surface passivation film
05/01/2001US6225240 Rapid acceleration methods for global planarization of spin-on films
05/01/2001US6225239 Immersing a iii-v group compound semiconductor substrates in a vessel containing a solution containing phosphonic acid and placing the substrate into a different solution to adsorb metal ions to the surface of the film
05/01/2001US6225238 Low dielectric constant polyorganosilicon coatings generated from polycarbosilanes
05/01/2001US6225237 Method for forming metal-containing films using metal complexes with chelating O- and/or N-donor ligands
05/01/2001US6225236 Method for reforming undercoating surface and method for production of semiconductor device
05/01/2001US6225235 Method and device for cleaning and etching individual wafers using wet chemistry
05/01/2001US6225234 In situ and ex situ hardmask process for STI with oxide collar application
05/01/2001US6225233 Semiconductor device manufacturing machine and method for manufacturing a semiconductor device by using THE same manufacturing machine
05/01/2001US6225232 Semiconductor processing methods, and methods of forming capacitor constructions
05/01/2001US6225231 Recovery of damages in a field oxide caused by high energy ion implant process
05/01/2001US6225230 Method of manufacturing semiconductor device
05/01/2001US6225229 Removable photoresist spacers in CMOS transistor fabrication
05/01/2001US6225228 Silicon oxide co-deposition/etching process
05/01/2001US6225227 Method for manufacturing semiconductor device
05/01/2001US6225226 Method for processing and integrating copper interconnects
05/01/2001US6225225 Method to form shallow trench isolation structures for borderless contacts in an integrated circuit
05/01/2001US6225224 System for dispensing polishing liquid during chemical mechanical polishing of a semiconductor wafer
05/01/2001US6225223 Method to eliminate dishing of copper interconnects
05/01/2001US6225222 Diffusion barrier enhancement for sub-micron aluminum-silicon contacts
05/01/2001US6225221 Method to deposit a copper seed layer for dual damascene interconnects
05/01/2001US6225220 Decreases the etching loading effect and the plug loss, thereby improving the reliability of the semiconductor device.
05/01/2001US6225219 Method of stabilizing anti-reflection coating layer
05/01/2001US6225218 Improve the long-term reliability of a tft or a liquid crystal display device by improving the reliability of contacts.
05/01/2001US6225217 Method of manufacturing semiconductor device having multilayer wiring
05/01/2001US6225216 Method of forming a local interconnect with improved etch selectivity of silicon dioxide/silicide
05/01/2001US6225215 Method for enhancing anti-reflective coatings used in photolithography of electronic devices
05/01/2001US6225214 Method for forming contact plug
05/01/2001US6225213 Manufacturing method for contact hole
05/01/2001US6225211 Method for making stacked and borderless via structures on semiconductor substrates for integrated circuits
05/01/2001US6225210 High density plasma deposition at such elevated temperatures increases the surface roughness of the exposed cu metallization, thereby increasing adhesion of the deposited capping layer
05/01/2001US6225209 Method of fabricating crack resistant inter-layer dielectric for a salicide process
05/01/2001US6225208 Method and structure for improved alignment tolerance in multiple, singularized plugs
05/01/2001US6225207 Techniques for triple and quadruple damascene fabrication
05/01/2001US6225206 Flip chip C4 extension structure and process