| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
|---|
| 06/05/2001 | US6242776 Device improvement by lowering LDD resistance with new silicide process |
| 06/05/2001 | US6242775 Circuits and methods using vertical complementary transistors |
| 06/05/2001 | US6242774 Poly spacer split gate cell with extremely small cell size |
| 06/05/2001 | US6242773 Self-aligning poly 1 ono dielectric for non-volatile memory |
| 06/05/2001 | US6242771 Chemical vapor deposition of PB5GE3O11 thin film for ferroelectric applications |
| 06/05/2001 | US6242770 Diode connected to a magnetic tunnel junction and self aligned with a metallic conductor and method for forming the same |
| 06/05/2001 | US6242767 Asic routing architecture |
| 06/05/2001 | US6242766 High electron mobility transistor |
| 06/05/2001 | US6242759 Semiconductor device and method for forming the same |
| 06/05/2001 | US6242758 Semiconductor device employing resinous material, method of fabricating the same and electrooptical device |
| 06/05/2001 | US6242750 Ion implantation device |
| 06/05/2001 | US6242747 Method and system for optimizing linac operational parameters |
| 06/05/2001 | US6242739 Method and apparatus for non-destructive determination of film thickness and dopant concentration using fourier transform infrared spectrometry |
| 06/05/2001 | US6242719 Multiple-layered ceramic heater |
| 06/05/2001 | US6242718 Wafer holder |
| 06/05/2001 | US6242709 Method for manufacturing conductive wafers, method for manufacturing thin-plate sintered compacts, method for manufacturing ceramic substrates for thin-film magnetic head, and method for machining conductive wafers |
| 06/05/2001 | US6242513 Method of applying a die attach adhesive |
| 06/05/2001 | US6242400 Method of stripping resists from substrates using hydroxylamine and alkanolamine |
| 06/05/2001 | US6242368 Removal of carbon from substrate surface |
| 06/05/2001 | US6242367 Forming silicon nitride layers on silicon using silane |
| 06/05/2001 | US6242366 Liquid short-chain silicon polymer is deposited on a substrate; short-chain polymer is then subjected to further polymerization to form an amorphous structure |
| 06/05/2001 | US6242365 Method for preventing film deposited on semiconductor wafer from cracking |
| 06/05/2001 | US6242363 Method of etching a wafer layer using a sacrificial wall to form vertical sidewall |
| 06/05/2001 | US6242362 Etch process for fabricating a vertical hard mask/conductive pattern profile to improve T-shaped profile for a silicon oxynitride hard mask |
| 06/05/2001 | US6242361 Plasma treatment to improve DUV photoresist process |
| 06/05/2001 | US6242360 Plasma processing system apparatus, and method for delivering RF power to a plasma processing |
| 06/05/2001 | US6242359 Plasma cleaning and etching methods using non-global-warming compounds |
| 06/05/2001 | US6242358 Method for etching metal film containing aluminum and method for forming interconnection line of semiconductor device using the same |
| 06/05/2001 | US6242357 Method for forming a deep trench capacitor of a DRAM cell |
| 06/05/2001 | US6242356 Etchback method for forming microelectronic layer with enhanced surface smoothness |
| 06/05/2001 | US6242355 Method for insulating metal conductors by spin-on-glass and devices made |
| 06/05/2001 | US6242354 Semiconductor device with self aligned contacts having integrated silicide stringer removal and method thereof |
| 06/05/2001 | US6242353 Wafer holding head and wafer polishing apparatus, and method for manufacturing wafers |
| 06/05/2001 | US6242352 Method of preventing micro-scratches on the surface of a semiconductor wafer when performing a CMP process |
| 06/05/2001 | US6242351 Multistage process of semiconductor wafers and water slurry |
| 06/05/2001 | US6242350 Post gate etch cleaning process for self-aligned gate mosfets |
| 06/05/2001 | US6242349 Forming a seed layer, annealing to increase grain size and plating copper on seed layer |
| 06/05/2001 | US6242348 Forming transistors with cobalt silicide layers |
| 06/05/2001 | US6242347 Method for cleaning a process chamber |
| 06/05/2001 | US6242346 Metallization for uncovered contacts and vias |
| 06/05/2001 | US6242345 Batch process for forming metal plugs in a dielectric layer of a semiconductor wafer |
| 06/05/2001 | US6242344 Tri-layer resist method for dual damascene process |
| 06/05/2001 | US6242343 Process for fabricating semiconductor device and apparatus for fabricating semiconductor device |
| 06/05/2001 | US6242342 Fabrication method for a borderless via of a semiconductor device |
| 06/05/2001 | US6242341 Planarization using laser ablation |
| 06/05/2001 | US6242340 Connecting semiconductors, insulation, layers, removing |
| 06/05/2001 | US6242339 Connecting, insulation films, silicon dioxide, metals, vapor deposition with reactive gas, forming wire grooves and connecting |
| 06/05/2001 | US6242338 Method of passivating a metal line prior to deposition of a fluorinated silica glass layer |
| 06/05/2001 | US6242337 Semiconductor device and method of manufacturing the same |
| 06/05/2001 | US6242336 Semiconductor device having multilevel interconnection structure and method for fabricating the same |
| 06/05/2001 | US6242334 Multi-step spacer formation of semiconductor devices |
| 06/05/2001 | US6242333 Method to enhance the formation of nucleation sites on silicon structures and an improved silicon structure |
| 06/05/2001 | US6242332 Method for forming self-aligned contact |
| 06/05/2001 | US6242331 Method to reduce device contact resistance using a hydrogen peroxide treatment |
| 06/05/2001 | US6242330 Process for breaking silicide stringers extending between silicide areas of different active regions |
| 06/05/2001 | US6242329 Method for manufacturing asymmetric channel transistor |
| 06/05/2001 | US6242328 Semiconductors, vapor phase epitaxial method and doped with p type impurities |
| 06/05/2001 | US6242327 Compound semiconductor device having a reduced source resistance |
| 06/05/2001 | US6242326 Method for fabricating compound semiconductor substrate having quantum dot array structure |
| 06/05/2001 | US6242325 Method for optimising the etch rate of polycrystalline layer |
| 06/05/2001 | US6242324 Method for fabricating singe crystal materials over CMOS devices |
| 06/05/2001 | US6242323 Semiconductor device and process for producing the same |
| 06/05/2001 | US6242322 Method for forming shallow trench isolation filled with high-density plasma oxide layer |
| 06/05/2001 | US6242321 Structure and fabrication method for non-planar memory elements |
| 06/05/2001 | US6242320 Method for fabricating SOI wafer |
| 06/05/2001 | US6242319 Method for fabricating an integrated circuit configuration |
| 06/05/2001 | US6242318 Alignment method and semiconductor device |
| 06/05/2001 | US6242317 High quality isolation structure formation |
| 06/05/2001 | US6242316 Semiconductor device having capacitor and method of fabricating the same |
| 06/05/2001 | US6242315 Method of manufacturing mixed mode semiconductor device |
| 06/05/2001 | US6242314 Method for fabricating a on-chip temperature controller by co-implant polysilicon resistor |
| 06/05/2001 | US6242313 Use of polysilicon field plates to improve high voltage bipolar device breakdown voltage |
| 06/05/2001 | US6242312 Advanced titanium silicide process for very narrow polysilicon lines |
| 06/05/2001 | US6242311 Method of fabricating a semiconductor device with silicided gates and peripheral region |
| 06/05/2001 | US6242310 Method of forming buried-strap with reduced outdiffusion including removing a sacrificial insulator leaving a gap and supporting spacer |
| 06/05/2001 | US6242309 Method of forming a split gate flash memory cell |
| 06/05/2001 | US6242308 Method of forming poly tip to improve erasing and programming speed split gate flash |
| 06/05/2001 | US6242307 Method of fabricating flash memory |
| 06/05/2001 | US6242306 Dual bit isolation scheme for flash memory devices having polysilicon floating gates |
| 06/05/2001 | US6242305 Process for fabricating a bit-line using buried diffusion isolation |
| 06/05/2001 | US6242304 Method and structure for textured surfaces in floating gate tunneling oxide devices |
| 06/05/2001 | US6242303 Nonvolatile memories with high capacitive-coupling ratio |
| 06/05/2001 | US6242302 Semiconductor processing methods of forming contact openings, methods of forming electrical connections and interconnections, and integrated circuitry |
| 06/05/2001 | US6242301 Capacitor and conductive line constructions and semiconductor processing methods of forming capacitors and conductive lines |
| 06/05/2001 | US6242300 Mixed mode process for embedded dram devices |
| 06/05/2001 | US6242299 Barrier layer to protect a ferroelectric capacitor after contact has been made to the capacitor electrode |
| 06/05/2001 | US6242298 Semiconductor memory device having epitaxial planar capacitor and method for manufacturing the same |
| 06/05/2001 | US6242297 Semiconductor device having an improved interconnection and method for fabricating the same |
| 06/05/2001 | US6242296 Method of fabricating embedded DRAM |
| 06/05/2001 | US6242295 Method of fabricating a shallow doped region for a shallow junction transistor |
| 06/05/2001 | US6242294 Method for fabricating a semiconductor device |
| 06/05/2001 | US6242293 Process for fabricating double recess pseudomorphic high electron mobility transistor structures |
| 06/05/2001 | US6242292 Method of producing a semiconductor device with overlapped scanned linear lasers |
| 06/05/2001 | US6242291 Laser annealing method and laser annealing device |
| 06/05/2001 | US6242290 Method of forming a TFT by adding a metal to a silicon film promoting crystallization, forming a mask, forming another silicon layer with group XV elements, and gettering the metal through opening in the mask |
| 06/05/2001 | US6242289 Method for producing semiconductor device |
| 06/05/2001 | US6242288 Anneal-free process for forming weak collector |
| 06/05/2001 | US6242287 Semiconductor device manufacturing method, press die and guide rail including forming a crack perpendicular to an extension of the sealing resin |
| 06/05/2001 | US6242286 Multilayer high density micro circuit module and method of manufacturing same |
| 06/05/2001 | US6242285 Stacked package of semiconductor package units via direct connection between leads and stacking method therefor |