| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 05/28/2002 | US6396635 Beam shaping element for use in a lithographic system |
| 05/28/2002 | US6396566 Stage system for exposure apparatus and device manufacturing method in which a stage supporting member and a countermass supporting member provide vibration isolation |
| 05/28/2002 | US6396563 Exposure apparatus |
| 05/28/2002 | US6396562 Microdevice manufacturing apparatus |
| 05/28/2002 | US6396560 Method of producing liquid crystal display panel |
| 05/28/2002 | US6396557 Tape carrier package and liquid crystal display device |
| 05/28/2002 | US6396470 Liquid crystal display apparatus |
| 05/28/2002 | US6396387 Thin films resistors |
| 05/28/2002 | US6396323 Phase adjustor for semiconductor integrated circuit |
| 05/28/2002 | US6396321 Semiconductor integrated circuit equipped with function for controlling the quantity of processing per unit time length by detecting internally arising delay |
| 05/28/2002 | US6396319 Semiconductor integrated circuit with quick charging/discharging circuit |
| 05/28/2002 | US6396297 Electrical detection of V-groove width |
| 05/28/2002 | US6396293 Self-closing spring probe |
| 05/28/2002 | US6396215 Ion-implantation apparatus and method of ion-implantation by use of this apparatus |
| 05/28/2002 | US6396160 Fill strategies in the optical kerf |
| 05/28/2002 | US6396159 Semiconductor device |
| 05/28/2002 | US6396158 Semiconductor device and a process for designing a mask |
| 05/28/2002 | US6396157 Semiconductor integrated circuit device and manufacturing method thereof |
| 05/28/2002 | US6396156 Flip-chip bonding structure with stress-buffering property and method for making the same |
| 05/28/2002 | US6396155 Semiconductor device and method of producing the same |
| 05/28/2002 | US6396153 Circuit chip package and fabrication method |
| 05/28/2002 | US6396152 Semiconductor device and production method thereof |
| 05/28/2002 | US6396151 Partially-overlapped interconnect structure and method of making |
| 05/28/2002 | US6396150 Wiring structure of semiconductor device |
| 05/28/2002 | US6396149 Method for double-layer implementation of metal options in an integrated chip for efficient silicon debug |
| 05/28/2002 | US6396148 Electroless metal connection structures and methods |
| 05/28/2002 | US6396147 Semiconductor device with metal-oxide conductors |
| 05/28/2002 | US6396146 Semiconductor device and its manufacturing method |
| 05/28/2002 | US6396145 Semiconductor device and method for manufacturing the same technical field |
| 05/28/2002 | US6396144 Mounting structure of semiconductor device, and communication apparatus using the same |
| 05/28/2002 | US6396143 Ball grid array type printed wiring board having exellent heat diffusibility and printed wiring board |
| 05/28/2002 | US6396139 Semiconductor package structure with exposed die pad |
| 05/28/2002 | US6396138 Chip array with two-sided cooling |
| 05/28/2002 | US6396136 Ball grid package with multiple power/ground planes |
| 05/28/2002 | US6396135 Substrate for use in semiconductor packaging |
| 05/28/2002 | US6396132 Semiconductor device with improved interconnections between the chip and the terminals, and process for its manufacture |
| 05/28/2002 | US6396128 Fixing structure and fixing method for semiconductor integrated circuit apparatus |
| 05/28/2002 | US6396126 High voltage transistor using P+ buried layer |
| 05/28/2002 | US6396124 Semiconductor device |
| 05/28/2002 | US6396123 Semiconductor device provided with on-chip decoupling condenser utilizing CMP dummy patterns |
| 05/28/2002 | US6396122 Method for fabricating on-chip inductors and related structure |
| 05/28/2002 | US6396121 Structures and methods of anti-fuse formation in SOI |
| 05/28/2002 | US6396120 Silicon anti-fuse structures, bulk and silicon on insulator fabrication methods and application |
| 05/28/2002 | US6396119 Reduced RC delay between adjacent substrate wiring lines |
| 05/28/2002 | US6396113 Active trench isolation structure to prevent punch-through and junction leakage |
| 05/28/2002 | US6396112 Method of fabricating buried source to shrink chip size in memory array |
| 05/28/2002 | US6396111 Semiconductor integrated circuit device having capacitor element |
| 05/28/2002 | US6396110 Semiconductor device with multiple emitter contact plugs |
| 05/28/2002 | US6396109 Isolated NMOS transistor fabricated in a digital BiCMOS process |
| 05/28/2002 | US6396108 Self-aligned double gate silicon-on-insulator (SOI) device |
| 05/28/2002 | US6396106 Thin film transistor and fabricating method thereof |
| 05/28/2002 | US6396105 Semiconductor thin film and its manufacturing method and semiconductor device and its manufacturing method |
| 05/28/2002 | US6396104 Thin film transistor in metal-induced crystallized region formed around a transition metal nucleus site |
| 05/28/2002 | US6396103 Optimized single side pocket implant location for a field effect transistor |
| 05/28/2002 | US6396102 Field coupled power MOSFET bus architecture using trench technology |
| 05/28/2002 | US6396101 Method for manufacturing electronic devices comprising non-volatile memory cells and LV transistors with salicided junctions |
| 05/28/2002 | US6396100 Efficient fabrication process for dual well type structures |
| 05/28/2002 | US6396099 Non-volatile memory device and manufacturing method thereof |
| 05/28/2002 | US6396098 Semiconductor memory device and method of fabricating the same |
| 05/28/2002 | US6396097 Semiconductor device including capacitor with improved bottom electrode |
| 05/28/2002 | US6396096 Design layout for a dense memory cell structure |
| 05/28/2002 | US6396095 Semiconductor memory and method of driving semiconductor memory |
| 05/28/2002 | US6396094 Oriented rhombohedral composition of PbZr1-xTixO3 thin films for low voltage operation ferroelectric RAM |
| 05/28/2002 | US6396093 Ferroelectric memory with reduced capacitance of ferroelectric gate layer |
| 05/28/2002 | US6396092 Semiconductor device and method for manufacturing the same |
| 05/28/2002 | US6396091 Chip scale package |
| 05/28/2002 | US6396090 Trench MOS device and termination structure |
| 05/28/2002 | US6396088 System with meshed power and signal buses on cell array |
| 05/28/2002 | US6396087 Semiconductor integrated circuit |
| 05/28/2002 | US6396086 Semiconductor device and semiconductor integrated circuit having a conductive film on element region |
| 05/28/2002 | US6396080 Single crystals containing dopes |
| 05/28/2002 | US6396078 Semiconductor device with a tapered hole formed using multiple layers with different etching rates |
| 05/28/2002 | US6396077 Semiconductor device provided with conductive layer and liquid crystal display |
| 05/28/2002 | US6396072 Load port door assembly with integrated wafer mapper |
| 05/28/2002 | US6396067 Mirror projection system for a scanning lithographic projection apparatus, and lithographic apparatus comprising such a system |
| 05/28/2002 | US6395994 Etched tri-metal with integrated wire traces for wire bonding |
| 05/28/2002 | US6395982 Leaded semiconductor device package for use in nonsoldering assembling |
| 05/28/2002 | US6395693 Cleaning solution for semiconductor surfaces following chemical-mechanical polishing |
| 05/28/2002 | US6395654 Method of forming ONO flash memory devices using rapid thermal oxidation |
| 05/28/2002 | US6395653 Semiconductor wafer with crystal lattice defects, and process for producing this wafer |
| 05/28/2002 | US6395652 Method of manufacturing thin film transistor |
| 05/28/2002 | US6395651 Surface treatment using organosilicon compound |
| 05/28/2002 | US6395650 Oxidation; applying radiation; reduce concentration of impurities |
| 05/28/2002 | US6395649 Low dielectric constant polyorganosilicon coatings generated from polycarbosilanes |
| 05/28/2002 | US6395648 Wafer processing system |
| 05/28/2002 | US6395647 Chemical treatment of semiconductor substrates |
| 05/28/2002 | US6395646 Machine for etching the edge of a wafer and method of etching the edge of a wafer |
| 05/28/2002 | US6395645 Anisotropic wet etching |
| 05/28/2002 | US6395644 Process for fabricating a semiconductor device using a silicon-rich silicon nitride ARC |
| 05/28/2002 | US6395643 Gas manifold for uniform gas distribution and photochemistry |
| 05/28/2002 | US6395642 Semiconductor substrate |
| 05/28/2002 | US6395640 Apparatus and method for selectivity restricting process fluid flow in semiconductor processing |
| 05/28/2002 | US6395639 Process for improving line width variations between tightly spaced and isolated features in integrated circuits |
| 05/28/2002 | US6395637 Method for fabricating a inductor of low parasitic resistance and capacitance |
| 05/28/2002 | US6395636 Methods for improved planarization post CMP processing |
| 05/28/2002 | US6395635 Reduction of tungsten damascene residue |
| 05/28/2002 | US6395632 Etch stop in damascene interconnect structure and method of making |
| 05/28/2002 | US6395631 Low dielectric constant dielectric layer fabrication method employing hard mask layer delamination |
| 05/28/2002 | US6395629 Depositing titanium layer over a dielectric layer; depositing an aluminum layer on titanium layer; patterning and etching titanium and aluminum layers to form an interconnect signal line |
| 05/28/2002 | US6395628 Contact/via force fill techniques |