Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2002
06/06/2002WO2002045166A2 Method for eliminating crack damage at interfaces in integrated circuits
06/06/2002WO2002045165A2 Compact semiconductor structure and a method for producing the same
06/06/2002WO2002045159A2 Method for fabricating electronics
06/06/2002WO2002045158A2 Memory cell with vertical floating gate transistor
06/06/2002WO2002045157A1 Simultaneous formation of charge storage and bitline to worldline isolation
06/06/2002WO2002045156A2 Cmos fabrication process utilizing special transistor orientation
06/06/2002WO2002045155A2 ELECTROLESS METHOD OF SEED LAYER DEPOSITION, REPAIR, AND FABRICATION OF Cu INTERCONNECTS
06/06/2002WO2002045154A1 Transfer robot and inspection method for thin substrate
06/06/2002WO2002045152A2 Flip chip mounting technique
06/06/2002WO2002045151A1 Semiconductor package and its manufacturing method
06/06/2002WO2002045149A1 Method for producing silicon wafer and silicon wafer
06/06/2002WO2002045148A2 Cleaning solution for semiconductor wafers in the back-end-of-line
06/06/2002WO2002045147A2 Method for pretreating dielectric layers to enhance the adhesion of cvd metal layers thereto
06/06/2002WO2002045146A1 Fabrication method of selectively oxidized porous silicon (sops) layer and multi-chip package using the same
06/06/2002WO2002045145A2 Uv-free curing of organic dielectrica
06/06/2002WO2002045144A1 Wet-etching agent composition
06/06/2002WO2002045143A1 Semiconductor wafer processing to increase the usable planar surface area
06/06/2002WO2002045142A2 Copper alloy interconnections for integrated circuits and methods of making same
06/06/2002WO2002045141A1 Method for manufacturing semiconductor wafer
06/06/2002WO2002045140A2 Semiconductor structures having a compliant substrate
06/06/2002WO2002045139A1 Method for identifying semiconductor integrated circuit device, method for manufacturing semiconductor integrated circuit device, semiconductor integrated circuit device and semiconductor chip
06/06/2002WO2002045138A1 Ceramic heater for semiconductor manufacturing and inspecting devices
06/06/2002WO2002045137A2 Reduced edge contact wafer handling system and method of retrofitting and using same
06/06/2002WO2002045135A2 Method for thermally treating substrates
06/06/2002WO2002045134A2 Gate process for dram array and logic devices on same chip
06/06/2002WO2002045132A2 Low defect density, thin-layer, soi substrates
06/06/2002WO2002045131A2 Process flow for capacitance enhancement in a dram trench
06/06/2002WO2002045130A2 Embedded vertical dram cells and dual workfunction logic gates
06/06/2002WO2002045128A2 Zirconium-doped bst materials and mocvd process for forming same
06/06/2002WO2002045127A2 Methods of endpoint detection for wafer planarization
06/06/2002WO2002045123A1 Electron beam generating device, and testing device
06/06/2002WO2002045090A2 Circuit for non-destructive, self-normalizing reading-out of mram memory cells
06/06/2002WO2002045014A2 Method and device for determining the properties of an integrated circuit
06/06/2002WO2002044927A2 Hardware configuration for parallel data processing without cross communication
06/06/2002WO2002044845A2 Protecting groups in polymers, photoresists and processes for microlithography
06/06/2002WO2002044816A2 Antireflective layer for use in microlithography
06/06/2002WO2002044815A2 Multilayer elements containing photoresist compositions and their use in microlithography
06/06/2002WO2002044814A2 Photoresist compositions comprising bases and surfactants for microlithography
06/06/2002WO2002044811A2 Polymers blends and their use in photoresist compositions for microlithography
06/06/2002WO2002044805A2 Method of increasing the conductivity of a transparent conductive layer
06/06/2002WO2002044804A2 Pixellated devices such as active matrix liquid crystal displays
06/06/2002WO2002044803A2 Liquid-crystal display
06/06/2002WO2002044786A2 Catadioptric projection system for 157 nm lithography
06/06/2002WO2002044699A2 Method and device for determining the properties of an integrated circuit
06/06/2002WO2002044696A1 Method and apparatus for monitoring environment and apparatus for producing semiconductor
06/06/2002WO2002044687A2 Method and device utilizing plasma source for real-time gas sampling
06/06/2002WO2002044634A1 Electrode cooler of processing device
06/06/2002WO2002044445A1 Method for depositing especially, crystalline layers and device for carrying out the method
06/06/2002WO2002044444A1 Method and apparatus for producing miiin columns and miiin materials grown thereon
06/06/2002WO2002044443A1 Methods and apparatus for producing m'n based materials
06/06/2002WO2002044441A2 Method and device for the metered delivery of low volumetric flows
06/06/2002WO2002044300A2 Cerium-based abrasive and production process thereof
06/06/2002WO2002044293A2 Method and composition for the removal of residual materials during substrate planarization
06/06/2002WO2002044241A1 Liquid epoxy resin composition for encapsulating material
06/06/2002WO2002044060A1 Fims interface without alignment pins
06/06/2002WO2002043925A1 Abrasive article having a window system for polishing wafers, and methods
06/06/2002WO2002043923A1 Cleaning device for cleaning polishing cloths used for polishing semiconductor wafers
06/06/2002WO2002043803A1 Ion implantation system and control method
06/06/2002WO2002043466A2 Non-thermionic sputter material transport device, methods of use, and materials produced thereby
06/06/2002WO2002029392A3 Defect source identifier
06/06/2002WO2002027059A3 System and method for controlling movement of a workpiece in a thermal processing system
06/06/2002WO2002025728A3 Dual thickness gate oxide fabrication method using plasma surface treatment
06/06/2002WO2002025715A3 Method of fabricating conductor structures with metal comb bridging avoidance
06/06/2002WO2002025714A8 A process for dry-etching a semiconductor wafer surface
06/06/2002WO2002025707A3 Method and apparatus for alignment of carriers and semiconductor processing equipment
06/06/2002WO2002025700A3 Semiconductor device and method of forming a semiconductor device
06/06/2002WO2002023631A3 Direct build-up layer on an encapsulated die package having a moisture barrier structure
06/06/2002WO2002023594A3 Apparatus and method for reducing contamination on thermally processed semiconductor substrates
06/06/2002WO2002020881A3 Apparatus and method for cleaning a bell jar in a barrel epitaxial reactor
06/06/2002WO2002019393A3 Method of processing a semiconductor wafer
06/06/2002WO2002019374A3 Methods and apparatus for adjusting beam parallelism in ion implanters
06/06/2002WO2002018960A3 Device and method for characterizing the version of integrated circuits and use for controlling operations
06/06/2002WO2002017354A3 Ring chuck to hold 200 and 300 mm wafer
06/06/2002WO2002015276A3 Memory cell, memory cell device and method for the production thereof
06/06/2002WO2002015234A3 Carrier monitoring and fab-wide carrier management systems
06/06/2002WO2002009485A3 Flip chip package, circuit board thereof and packaging method thereof
06/06/2002WO2002009484A3 Electrical component assembly and method of fabrication
06/06/2002WO2002005321A3 Method to isolate multi zone heater from atmosphere
06/06/2002WO2002005268A3 All metal giant magnetoresistive memory
06/06/2002WO2002004541A3 No-flow flux adhesive compositions
06/06/2002WO2002003457A3 Via first dual damascene process for copper metallization
06/06/2002WO2002003449A3 Apparatus and method for investigating semiconductor wafers
06/06/2002WO2002003439A3 Process for selectively etching doped silicon dioxide over undoped silicon dioxide and silicon nitride
06/06/2002WO2002003426A3 Process for the post etch stripping of photoresist with hydrogen
06/06/2002WO2002003420A3 Integrated circuit radio architectures
06/06/2002WO2002001612A3 Mechanical clamper for heated substrates at die attach
06/06/2002WO2002001568A3 Dynamic random access memory
06/06/2002WO2001095373A3 Silicon carbide cantilever paddle
06/06/2002WO2001090882A3 Programmable single-chip device and related development environment
06/06/2002WO2001084553A3 Three-dimensional memory array and method of fabrication
06/06/2002WO2001082334A3 Semiconductor handler for rapid testing
06/06/2002WO2001078141A3 USE OF AlN AS COPPER PASSIVATION LAYER AND THERMAL CONDUCTOR
06/06/2002WO2001078103A3 Bi-directional electron beam scanning apparatus
06/06/2002WO2001073866A3 Method and apparatus for integrated-battery devices
06/06/2002WO2001072097A3 Apparatus and method for mounting component
06/06/2002WO2000060659A9 Improved trench isolation process to deposit a trench fill oxide prior to sidewall liner oxidation growth
06/06/2002US20020069398 Correcting method of mask and mask manufactured by said method
06/06/2002US20020069397 Method and apparatus for placing circuit modules
06/06/2002US20020069394 Method and circuits for performing offline circuit trimming
06/06/2002US20020069374 Adjustable data delay using programmable clock shift
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