Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2002
06/11/2002US6403982 Semi-insulating silicon carbide without vanadium domination
06/11/2002US6403981 Double gate transistor having a silicon/germanium channel region
06/11/2002US6403980 Thin film transistor array panel for liquid crystal display
06/11/2002US6403978 Test pattern for measuring variations of critical dimensions of wiring patterns formed in the fabrication of semiconductor devices
06/11/2002US6403976 Semiconductor crystal, fabrication method thereof, and semiconductor device
06/11/2002US6403973 Electron beam exposure method and apparatus and semiconductor device manufactured using the same
06/11/2002US6403972 Methods and apparatus for alignment of ion beam systems using beam current sensors
06/11/2002US6403971 Beam-adjustment methods and apparatus for charged-particle-beam microlithography
06/11/2002US6403957 Nucleic acid reading and analysis system
06/11/2002US6403945 Device and method for detecting and distinguishing shelf-forming supports in cassettes and disk-shaped objects deposited thereon
06/11/2002US6403933 Thermal conditioning apparatus
06/11/2002US6403927 Heat-processing apparatus and method of semiconductor process
06/11/2002US6403926 Thermal processing apparatus having a coolant passage
06/11/2002US6403925 System and method for thermal processing of a semiconductor substrate
06/11/2002US6403924 Apparatus for and method of heat treatment and substrate processing apparatus
06/11/2002US6403923 System for controlling the temperature of a reflective substrate during rapid heating
06/11/2002US6403905 Reticle stocking and sorting management system
06/11/2002US6403895 Wiring substance and semiconductor
06/11/2002US6403892 Coated means for connecting a chip and a card
06/11/2002US6403881 Electronic component package assembly and method of manufacturing the same
06/11/2002US6403823 Ester compounds having alicyclic structure and method for preparing same
06/11/2002US6403822 Nucleophilic addition of alicyclic carbonyl and metal enolate of acetate; polycarbon monomers for photoresists; high reactivity and substrate affinity
06/11/2002US6403544 Semiconductor wafers or chips; supercritical co2 gas as a dense phase fluid and modifier selected from the group consisting of propylene carbonate, ethylene carbonate, butylene carbonate, propylene glycol methyl ether acetate
06/11/2002US6403502 Heat treatment method for a silicon wafer and a silicon wafer heat-treated by the method
06/11/2002US6403501 Method of controlling FSG deposition rate in an HDP reactor
06/11/2002US6403500 Cross-shaped resist dispensing system and method
06/11/2002US6403499 Planarization of non-planar surfaces in device fabrication
06/11/2002US6403498 Method and device for treating substrate
06/11/2002US6403497 Method of manufacturing semiconductor device by two stage heating of deposited noncrystalline semiconductor
06/11/2002US6403496 Method for forming shallow trench isolations
06/11/2002US6403495 Forming lower electrode by using gas including chlorine after step of forming hemispherical grained silicon seeds, removing seeds formed on insulation layer pattern through etching process using chlorine gas; increased surface, capacitance
06/11/2002US6403494 Method of forming a floating gate self-aligned to STI on EEPROM
06/11/2002US6403493 Microelectronic device fabricating methods
06/11/2002US6403492 Method of manufacturing semiconductor devices with trench isolation
06/11/2002US6403491 Etch method using a dielectric etch chamber with expanded process window
06/11/2002US6403490 Method of producing a plasma by capacitive-type discharges with a multipole barrier, and apparatus for implementing such a method
06/11/2002US6403488 Selective SAC etch process
06/11/2002US6403487 Method of forming separated spacer structures in mixed-mode integrated circuits
06/11/2002US6403486 Method for forming a shallow trench isolation
06/11/2002US6403485 Method to form a low parasitic capacitance pseudo-SOI CMOS device
06/11/2002US6403484 Method to achieve STI planarization
06/11/2002US6403483 Shallow trench isolation having an etching stop layer and method for fabricating same
06/11/2002US6403482 Self-aligned junction isolation
06/11/2002US6403481 Film formation method
06/11/2002US6403480 Process for manufacturing semiconductor device
06/11/2002US6403479 Process for producing semiconductor and apparatus for production
06/11/2002US6403478 Low pre-heat pressure CVD TiN process
06/11/2002US6403477 Method for correcting an optical proximity effect in an interconnect pattern by shortening the legs of cutout patterns to avoid linewidth reduction
06/11/2002US6403476 Semiconductor chip, semiconductor wafer, semiconductor device and method of manufacturing the semiconductor device
06/11/2002US6403475 Fabrication method for semiconductor integrated device
06/11/2002US6403474 Forming a dielectric on a substrate; forming an opening in the dielectric layer, depositing a barrier layer to line the barrier layer, covering it with a conductor layer of a metal to fill the channel opening, performing annealing twice
06/11/2002US6403473 Process for producing metal-containing layers
06/11/2002US6403472 Method of forming resistive contacts on intergrated circuits with mobility spoiling ions including high resistive contacts and low resistivity silicide contacts
06/11/2002US6403471 Method of forming a dual damascene structure including smoothing the top part of a via
06/11/2002US6403470 Method for fabricating a dual damascene structure
06/11/2002US6403469 Method of manufacturing dual damascene structure
06/11/2002US6403468 Method for forming embedded metal wiring
06/11/2002US6403467 Semiconductor device and method for manufacturing same
06/11/2002US6403466 Post-CMP-Cu deposition and CMP to eliminate surface voids
06/11/2002US6403465 Method to improve copper barrier properties
06/11/2002US6403464 Method to reduce the moisture content in an organic low dielectric constant material
06/11/2002US6403462 Method for manufacturing high reliability interconnection having diffusion barrier layer
06/11/2002US6403461 Method to reduce capacitance between metal lines
06/11/2002US6403460 Method of making a semiconductor chip assembly
06/11/2002US6403459 Fabrication process of semiconductor integrated circuit device
06/11/2002US6403458 Method for fabricating local interconnect structure for integrated circuit devices, source structures
06/11/2002US6403457 Selectively coating bond pads
06/11/2002US6403456 T or T/Y gate formation using trim etch processing
06/11/2002US6403455 Methods of fabricating a memory device
06/11/2002US6403454 Silicon semiconductor devices with δ-doped layers
06/11/2002US6403453 Dose control technique for plasma doping in ultra-shallow junction formations
06/11/2002US6403452 Ion implantation method and ion implantation equipment
06/11/2002US6403451 Methods of fabricating gallium nitride semiconductor layers on substrates including non-gallium nitride posts
06/11/2002US6403450 Heat treatment method for semiconductor substrates
06/11/2002US6403449 Method of relieving surface tension on a semiconductor wafer
06/11/2002US6403447 Reduced substrate capacitance high performance SOI process
06/11/2002US6403446 Method for manufacturing semiconductor device
06/11/2002US6403445 Enhanced trench isolation structure
06/11/2002US6403444 Method for forming storage capacitor having undulated lower electrode for a semiconductor device
06/11/2002US6403443 Method for reducing surface humps of doped amorphous silicon layer
06/11/2002US6403442 Methods of forming capacitors and resultant capacitor structures
06/11/2002US6403441 Method for fabricating storage capacitor using high dielectric constant material
06/11/2002US6403440 Method for fabricating a stacked capacitor in a semiconductor configuration, and stacked capacitor fabricated by this method
06/11/2002US6403439 Method of preparing for structural analysis a deep trench-type capacitor and method of structural analysis therefor
06/11/2002US6403438 Process for manufacturing a resistive structure used in semiconductor integrated circuits
06/11/2002US6403437 Method for making hyperfrequency transistor
06/11/2002US6403436 Semiconductor device and method of manufacturing the same
06/11/2002US6403435 Method for fabricating a semiconductor device having recessed SOI structure
06/11/2002US6403434 Process for manufacturing MOS transistors having elevated source and drain regions and a high-k gate dielectric
06/11/2002US6403433 Source/drain doping technique for ultra-thin-body SOI MOS transistors
06/11/2002US6403432 Borophosphosilicate glass (bpsg), although a phosphosilicate glass psg may be used as well
06/11/2002US6403431 Method of forming in an insulating layer a trench that exceeds the photolithographic resolution limits
06/11/2002US6403430 Semiconductor structure having more usable substrate area and method for forming same
06/11/2002US6403429 Semiconductor processing methods of forming integrated circuitry, forming conductive lines, forming a conductive grid, forming a conductive network, forming an electrical interconnection to a node location, forming an electrical interconnection with a transistor source/drain region, and integrated circuitry
06/11/2002US6403428 Method of forming shallow trench isolation
06/11/2002US6403427 Field effect transistor having dielectrically isolated sources and drains and method for making same
06/11/2002US6403426 Method of manufacturing a semiconductor device
06/11/2002US6403425 Dual gate oxide process with reduced thermal distribution of thin-gate channel implant profiles due to thick-gate oxide
06/11/2002US6403424 Method for forming self-aligned mask read only memory by dual damascene trenches
06/11/2002US6403423 Modified gate processing for optimized definition of array and logic devices on same chip
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