Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2002
10/03/2002US20020142586 Method of forming dual damascene structure
10/03/2002US20020142585 Reacting a mixture comprising an oxidizable siloxane and an oxidizable compound with a tertiarybutyl, tertiarybutoxy, furfuryl, furfuryloxy, or neopentyl group that decomposes to gases that leave voids when the material is annealed
10/03/2002US20020142584 Post-planarization clean-up
10/03/2002US20020142583 Forming a conductive barrier layer of a metal nitride while continuously reducing the supply of nitrogen source gas; and electroplating a metal layer directly on a top surface of the barrier layer.
10/03/2002US20020142582 Method for forming copper lines for semiconductor devices
10/03/2002US20020142581 Assembly including semiconductor chip, conductive pad, conductive trace, connection joint, and insulative adhesive; conductive trace includes routing line and pillar; connection joint contacts and electrically connects routing line and pad
10/03/2002US20020142580 Spin coating a first dielectric layer on a substrate; growing a liquid-phase-deposition (LPD) silica layer on the first dielectric layer; and spin coating a second dielectric layer on the LPD silica layer.
10/03/2002US20020142579 Chemical vapor deposition from a silyl ether, a silyl ether oligomer, or an organosilicon compound containing one or more reactive groups, to form an interlayer dielectric film having a dielectric constant of 3.5 or less.
10/03/2002US20020142578 Cap layer protects the underlying organosilicate layer from cracking and peeling when it is hardened during a subsequent annealing step.
10/03/2002US20020142577 Low dielectric-constant dielectric for etchstop in dual damascene backend of integrated circuits
10/03/2002US20020142576 Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device
10/03/2002US20020142575 Method for forming aluminum bumps by cvd and wet etch
10/03/2002US20020142573 Metallization process
10/03/2002US20020142572 Method for forming metallic film and apparatus for forming the same
10/03/2002US20020142571 Semiconductor device
10/03/2002US20020142570 Method for fabrication of a high capacitance interpoly dielectric
10/03/2002US20020142569 Method for fabricating a nitride read-only -memory (nrom)
10/03/2002US20020142568 Method and system for efficiently scheduling multi-chamber fabrication tool capacity
10/03/2002US20020142567 Method for manufacturing polycrystalline semiconductor layers and thin-film transistors, and laser annealing apparatus
10/03/2002US20020142566 Silicon wafers for CMOS and other integrated circuits
10/03/2002US20020142565 Method for fabricating a polycrystalline silicon film
10/03/2002US20020142564 Method of forming a trench isolation structure and semiconductor device
10/03/2002US20020142563 Nitride compound based semiconductor device and manufacturing method of same
10/03/2002US20020142562 Method for manufacturing device substrate with metal back-gate and structure formed thereby
10/03/2002US20020142560 Reacting tantalum oxide with sulfur trioxide
10/03/2002US20020142559 Method to reduce floating grain defects in dual-sided container capacitor fabrication
10/03/2002US20020142558 Self-aligned SiGe HBT BiCMOS on SOI substrate and method of fabricating the same
10/03/2002US20020142557 Semiconductor device and a method of manufacturing the same
10/03/2002US20020142556 Method for manufacturing transistor of double spacer structure
10/03/2002US20020142555 Method for fabricating a semiconductor device
10/03/2002US20020142554 Semiconductor device and process for production thereof
10/03/2002US20020142553 Method of forming an ultra-shallow junction
10/03/2002US20020142552 Methods of fabricating a semiconductor device structure for manufacturing high-density and high-performance integrated-circuits
10/03/2002US20020142551 CMOS structure with non-epitaxial raised source/drain and self-aligned gate and method of manufacture
10/03/2002US20020142550 Semiconductor device and method of manufacturing the same
10/03/2002US20020142549 Method for manufacturing a semiconductor device
10/03/2002US20020142548 Semiconductor device and method for manufacturing the same
10/03/2002US20020142547 Method of fabricating gate
10/03/2002US20020142545 Method of fabricating a self-aligned split gate flash memory cell
10/03/2002US20020142544 Method of forming a self-aligned floating gate poly to an active region for a flash E2PROM cell
10/03/2002US20020142543 Method for manufacturing a self - aligned split-gate flash memory cell
10/03/2002US20020142542 Method of fabricating a high-coupling ratio flash memory
10/03/2002US20020142541 Methods of forming nitrogen-containing masses, silicon nitride layers, and capacitor constructions
10/03/2002US20020142540 Method of manufacturing semiconductor integrated circuit having capacitor and silicided and non-silicided transistors
10/03/2002US20020142539 Self-aligned method for fabricating a capacitor under bit-line (cub) dynamic random access memory (DRAM) cell structure
10/03/2002US20020142538 Integrated circuits; vapor deposition
10/03/2002US20020142537 Multilevel hard mask for etching
10/03/2002US20020142536 Method of making single c-axis PGO thin film on ZrO2 for non-volatile memory applications
10/03/2002US20020142535 Modified nitride spacer for solving charge retention issue in floating gate memory cell
10/03/2002US20020142534 Semiconductor integrated circuit
10/03/2002US20020142533 Low-dielectric-constant interlayer insulating film composed of borazine-silicon-based polymer and semiconductor device
10/03/2002US20020142532 Method for manufacturing semiconductor device
10/03/2002US20020142531 Dual damascene copper gate and interconnect therefore
10/03/2002US20020142530 Utilizing amorphorization of polycrystalline structures to achieve t-shaped mosfet gate
10/03/2002US20020142529 Semiconductor device comprising buried channel region and method for manufacturing the same
10/03/2002US20020142528 Method for fabricating thin film transistor including crystalline silicon active layer
10/03/2002US20020142527 Method for fabricating a body region for a vertical MOS transistor arrangement having a reduced on resistivity
10/03/2002US20020142526 Structures and methods to minimize plasma charging damage in silicon on insulator devices
10/03/2002US20020142525 Method of manufacturing semiconductor device
10/03/2002US20020142524 Multi-thickness silicide device formed by disposable spacers
10/03/2002US20020142523 Method of fabricating semiconductor device having notched gate
10/03/2002US20020142522 Kill index analysis for automatic defect classification in semiconductor wafers
10/03/2002US20020142520 Method of making semiconductor device
10/03/2002US20020142519 Production process for the local interconnection level using a dielectric-conducting pair on grid
10/03/2002US20020142518 Chip scale package and manufacturing method
10/03/2002US20020142517 Flip chip interconnection using no-clean flux
10/03/2002US20020142516 Methods of bonding microelectronic elements
10/03/2002US20020142514 Microelectronic assembly with die support and method
10/03/2002US20020142513 Ball grid array interposer, packages and methods
10/03/2002US20020142511 Method of fabricating semiconductor device having alignment mark
10/03/2002US20020142510 Solid image pickup apparatus and production method thereof
10/03/2002US20020142509 Having first interlayer film serving not only as layer to form contact or via hole but also etch stop layer in etching second interlayer film to form interconnect trench opened to contact hole
10/03/2002US20020142508 Metal film protection of the surface of a structure formed on a semiconductor substrate during etching of the substrate by a KOH etchant
10/03/2002US20020142507 SOI semiconductor wafer having different thickness active layers and semiconductor device formed therein
10/03/2002US20020142506 Surface emission type semiconductor light-emitting device and method of manufacturing the same
10/03/2002US20020142505 Method of manufacturing an array substrate for a liquid crystal display device
10/03/2002US20020142502 Method and apparatus for fabricating semiconductor laser device
10/03/2002US20020142500 Ultra-thin interface oxidation by ozonated water rinsing for emitter poly structure
10/03/2002US20020142498 Method of inspecting process for manufacturing semiconductor device and method of manufacturing semiconductor device
10/03/2002US20020142497 Method of manufacturing a semiconductor device
10/03/2002US20020142495 Method of calculating characteristics of semiconductor device having gate electrode and program thereof
10/03/2002US20020142494 Method and system for fabricating contacts on semiconductor components
10/03/2002US20020142493 In-situ thickness measurement for use in semiconductor processing
10/03/2002US20020142492 Acoustic detection of dechucking and apparatus therefor
10/03/2002US20020142491 Ferroelectric memory device and method of manufacturing the same
10/03/2002US20020142489 Semiconductor device having a ferroelectric capacitor and a fabrication process thereof
10/03/2002US20020142488 Multilayer; semiconductor substrate, transistor, dielectric
10/03/2002US20020142487 MFMOS capacitors with high dielectric constant materials and a method of making the same
10/03/2002US20020142486 Method of fabricating semiconductor device
10/03/2002US20020142252 Forming semiconductors; etching using oxygen
10/03/2002US20020142251 Pattern formation method
10/03/2002US20020142238 Extracting pattern; charge particle beam exposure
10/03/2002US20020142235 Photo mask for fabricating semiconductor device having dual damascene structure
10/03/2002US20020142233 Photomask manufacturing mehtod, photomask manufactured by said manufacturing mehtod, and semiconductor device method using said photomask
10/03/2002US20020142229 Semiconductors
10/03/2002US20020142192 Method of patterning magnetic products using chemical reactions
10/03/2002US20020142177 Mixture of polymer and spherical filler
10/03/2002US20020142171 Silicon single crystal, silicon wafer, and epitaxial wafer
10/03/2002US20020142167 Chip on films; flexible printed circuit
10/03/2002US20020142165 Graphite-based heat sink
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