Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2002
12/10/2002US6492254 Ball grid array (BGA) to column grid array (CGA) conversion process
12/10/2002US6492252 Method of connecting a bumped conductive trace to a semiconductor chip
12/10/2002US6492251 Microelectronic joining processes with bonding material application
12/10/2002US6492250 Polycide gate structure and method of manufacture
12/10/2002US6492249 High-K gate dielectric process with process with self aligned damascene contact to damascene gate and a low-k inter level dielectric
12/10/2002US6492248 Few-particle-induced low-pressure TEOS process
12/10/2002US6492247 Method for eliminating crack damage induced by delaminating gate conductor interfaces in integrated circuits
12/10/2002US6492246 Method of forming a transistor in a semiconductor device
12/10/2002US6492245 Method of forming air gap isolation between a bit line contact structure and a capacitor under bit line structure
12/10/2002US6492244 Method and semiconductor structure for implementing buried dual rail power distribution and integrated decoupling capacitance for silicon on insulator (SOI) devices
12/10/2002US6492243 Methods of forming capacitors and resultant capacitor structures
12/10/2002US6492242 Method of forming of high K metallic dielectric layer
12/10/2002US6492241 Integrated capacitors fabricated with conductive metal oxides
12/10/2002US6492240 Method for forming improved high resistance resistor by treating the surface of polysilicon layer
12/10/2002US6492238 Bipolar transistor with raised extrinsic base fabricated in an integrated BiCMOS circuit
12/10/2002US6492237 Method of forming an NPN device
12/10/2002US6492236 Method of manufacturing a semiconductor device with a silicide
12/10/2002US6492235 Method for forming extension by using double etch spacer
12/10/2002US6492234 Process for the selective formation of salicide on active areas of MOS devices
12/10/2002US6492233 Memory cell with vertical transistor and buried word and body lines
12/10/2002US6492232 Method of manufacturing vertical semiconductor device
12/10/2002US6492231 Method of making triple self-aligned split-gate non-volatile memory device
12/10/2002US6492230 Process for fabricating nonvolatile semiconductor memory with a selection transistor
12/10/2002US6492229 Semiconductor device having reduced field oxide recess and method of fabrication
12/10/2002US6492228 Dual floating gate programmable read only memory cell structure and method for its fabrication and operation
12/10/2002US6492227 Method for fabricating flash memory device using dual damascene process
12/10/2002US6492226 Method for forming a metal capacitor in a damascene process
12/10/2002US6492225 Method of fabricating enhanced EPROM structures with accentuated hot electron generation regions
12/10/2002US6492224 Buried PIP capacitor for mixed-mode process
12/10/2002US6492223 Method of fabricating semiconductor device equipped with capacitor portion
12/10/2002US6492222 Lead zirconate titanate dielectric situated between elec-trodes; hardmasking with refractory nitride; removing portion of hardmask and ferroelectric material using chlorine, oxygen and fluorine bearing compounds
12/10/2002US6492221 DRAM cell arrangement
12/10/2002US6492220 Method for manufacturing semiconductor device capable of suppressing narrow channel width effect
12/10/2002US6492219 High voltage shield
12/10/2002US6492218 Use of a hard mask in the manufacture of a semiconductor device
12/10/2002US6492217 Complementary metal gates and a process for implementation
12/10/2002US6492216 Method of forming a transistor with a strained channel
12/10/2002US6492215 Semiconductor device and fabricating the same
12/10/2002US6492214 Method of fabricating an insulating layer
12/10/2002US6492213 Semiconductor device, thin film transistor and method for producing the same, and liquid crystal display apparatus and method for producing the same
12/10/2002US6492212 Variable threshold voltage double gated transistors and method of fabrication
12/10/2002US6492211 Method for novel SOI DRAM BICMOS NPN
12/10/2002US6492210 Method for fully self-aligned FET technology
12/10/2002US6492209 Selectively thin silicon film for creating fully and partially depleted SOI on same wafer
12/10/2002US6492203 Semiconductor device and method of fabrication thereof
12/10/2002US6492201 Forming microelectronic connection components by electrophoretic deposition
12/10/2002US6492200 Semiconductor chip package and fabrication method thereof
12/10/2002US6492198 Method for fabricating a semiconductor device
12/10/2002US6492197 Trilayer/bilayer solder bumps and fabrication methods therefor
12/10/2002US6492196 Packaging process for wafer level IC device
12/10/2002US6492195 Method of thinning a semiconductor substrate using a perforated support substrate
12/10/2002US6492194 Method for the packaging of electronic components
12/10/2002US6492193 Group III nitride photonic devices on silicon carbide substrates with conductive buffer interlayer structure
12/10/2002US6492192 Method of making a Schottky diode in an integrated circuit
12/10/2002US6492191 Method for manufacturing an A1xGayInzN film using a metal film for heat radiation
12/10/2002US6492190 Method of producing electrooptical device and method of producing driving substrate for driving electrooptical device
12/10/2002US6492189 Method of arranging exposed areas including a limited number of test element group (TEG) regions on a semiconductor wafer
12/10/2002US6492188 Monitor method for quality of metal ARC (antireflection coating) layer
12/10/2002US6492187 Method for automatically positioning electronic die within component packages
12/10/2002US6492186 Method for detecting an endpoint for an oxygen free plasma process
12/10/2002US6492122 Determining concentration of preferential nucleotide sequences in sample; obtain nucleotide sequences, amplify, hybridize with amplicons, detect and quantitate hybridization products
12/10/2002US6492092 Such as isobornylmethacrylate-p-hydroxyphenylmethacrylamide copolymer with 1,4-cyclohexanedimethanol diglycidyl ether crosslinker; insoluble to topcoat resist solvents, minimizes reflectivity, etch rate comparable to novolaks
12/10/2002US6492088 Homo- or copolymers of unsaturated or active hydrogen poly-carbonyls; deep ultraviolet photolithography; miniture semi-conductor integrated circuits; etch and heat resistance; high sensitivity, adhesiveness and resolution
12/10/2002US6492078 Simple operation for adjusting optical proximity effect of a light shielding film pattern and data processing
12/10/2002US6492074 Substrate for damping the beam; metallic filme for interrupting the beam; main patern with openings bored through the supstrate; auxiliary pattern with at least one window partion
12/10/2002US6492072 Vacuum ultraviolet transmitting silicon oxyfluoride lithography glass
12/10/2002US6492071 Wafer scale encapsulation for integrated flip chip and surface mount technology assembly
12/10/2002US6492070 Electron beam exposure mask and method for manufacturing electron beam exposure mask
12/10/2002US6492068 Etching method for production of semiconductor devices
12/10/2002US6491978 Deposition of CVD layers for copper metallization using novel metal organic chemical vapor deposition (MOCVD) precursors
12/10/2002US6491969 Disposable print head for ejecting controlled amounts of liquid (e.g. solder) at a high rate onto the suface (e.g. an integrated circuit); heating a metal hydride layer to generate hydrogen gas, the pressure from which ejects solder
12/10/2002US6491968 Methods for making spring interconnect structures
12/10/2002US6491871 System for determining receptor-ligand binding affinity
12/10/2002US6491857 Process of packaging semiconductor chip in synthetic resin produced from pressurized granular synthetic resin and molding die used therein
12/10/2002US6491843 Amino acid or carboxylic acid with halide functional group
12/10/2002US6491836 Semiconductor wafer and production method therefor
12/10/2002US6491835 Metal mask etching of silicon
12/10/2002US6491832 Method for processing specimens
12/10/2002US6491785 Ultrasonic vibration bonding machine
12/10/2002US6491784 Dry etching device
12/10/2002US6491764 Rotating substrate, supplying liquid and supplying a gaseous substance partially miscible with the liquid to the surface of the substrate so that when mixed it lowers the surface tension of the liquid; for integrated circuits, displays
12/10/2002US6491763 Processes for treating electronic components
12/10/2002US6491760 Scrub washing method
12/10/2002US6491758 CVD apparatus equipped with moisture monitoring
12/10/2002US6491757 Wafer support system
12/10/2002US6491752 Enhanced n-type silicon material for epitaxial wafer substrate and method of making same
12/10/2002US6491742 ESRF coolant degassing process
12/10/2002US6491732 Wafer handling apparatus and method
12/10/2002US6491619 Radiation delivery catheters and dosimetry methods
12/10/2002US6491571 Substrate for use in wafer attracting apparatus and manufacturing method thereof
12/10/2002US6491570 Polishing media stabilizer
12/10/2002US6491518 Apparatus for high-temperature and high-pressure treatment
12/10/2002US6491508 Molding die set
12/10/2002US6491491 Articulated robot
12/10/2002US6491452 Developing method and developing apparatus
12/10/2002US6491451 Wafer processing equipment and method for processing wafers
12/10/2002US6491435 Linear robot
12/10/2002US6491330 Edge gripping end effector wafer handling apparatus
12/10/2002US6491205 Assembly of multi-chip modules using eutectic solders
12/10/2002US6491203 Wire bonding apparatus
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