Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2003
06/11/2003CN1423334A Storage device with storage unit with four states
06/11/2003CN1423333A Semiconductor device with pit pull provided in storage unit
06/11/2003CN1423328A Semiconductor device of multi-layer wiring structure and making method thereof
06/11/2003CN1423327A Semiconductor device and its making method
06/11/2003CN1423326A Exposed signal line and semiconductor having gap between signal line and substrate sheet
06/11/2003CN1423324A Method for making concealed potential source line of cover curtain type read-only memory
06/11/2003CN1423323A Method for preventing leakage current of embedded non-volatile memory
06/11/2003CN1423322A Flash memory unit forming method
06/11/2003CN1423321A Embedded source/drain electrode zone memory assembly manufacture method
06/11/2003CN1423320A Non-volatile memory unit with nonplanar structure and its manufacture method
06/11/2003CN1423319A Method for making silicide film of plane unit storage element
06/11/2003CN1423318A Semiconductor device and producing method thereof
06/11/2003CN1423317A Method for locally forming silicide metal layer
06/11/2003CN1423316A Apparatus for mounting semiconductor chip
06/11/2003CN1423315A Semiconductor module and production method thereof and module for IC card etc.
06/11/2003CN1423314A Metal oxide semiconductor transistor manufacture method
06/11/2003CN1423313A Method for manufacturing double-diffused drain electrode
06/11/2003CN1423312A Method for reducing device size using reducing drain electrode inplanting range
06/11/2003CN1423311A Throttle making method
06/11/2003CN1423310A Etching method for forming channel having high depth-width ratio
06/11/2003CN1423309A Method for removing dielectric layer of circumference edge for semiconductor crystal circle
06/11/2003CN1423308A Base-board drying device and method for drying base-board using same
06/11/2003CN1423307A Chemical solution conveying device and method for preparing suspension liquid
06/11/2003CN1423306A Method for making semiconductor with double-grid oxide layer
06/11/2003CN1423305A Method for making semiconductor device
06/11/2003CN1423304A Method for processing semi-conductor chip and lining substrate of semi-conductor chip thereof
06/11/2003CN1423303A Protective circuit of automation for semiconductor factory
06/11/2003CN1423283A Semiconductor storage circuit not easy to make soft mistakes
06/11/2003CN1423282A Storage device
06/11/2003CN1423281A Magnetic random-access storage device and reading method thereof
06/11/2003CN1423195A Programme generation, changing system and method and semiconductor device development system
06/11/2003CN1423172A Liquid composition for removing residue of photo-corrosion-inhibitor
06/11/2003CN1423170A Pattern transfer method
06/11/2003CN1423163A Method for preparing polarization-insensitive semiconductor optical amplifier
06/11/2003CN1423153A Conductive element and liquid crystal display with said conductive element
06/11/2003CN1422979A Transparent conductive film, its forming method and product having same
06/11/2003CN1422799A Molecular tunnel junction and method of producing the same
06/11/2003CN1422794A Inhaling holding device
06/11/2003CN1422791A Semiconductor chip transmission method and apparatus for transmitting semiconductor chip using same
06/11/2003CN1422728A Grinder and method for grinding workpiece
06/11/2003CN1111312C Oxide magnetic materials, making method, antenna coils, and inductance elements
06/11/2003CA2409241A1 Process for manufacturing an electronic component incorporating an inductive microcomponent
06/10/2003US6578188 Method and apparatus for a network-based mask defect printability analysis system
06/10/2003US6578184 Circuit design method and circuit design apparatus
06/10/2003US6578182 Delay analysis method and design assist apparatus of semiconductor circuit
06/10/2003US6578179 LSI layout design apparatus, layout design method, recording medium recording layout design program, and semiconductor integrated circuit
06/10/2003US6578177 Method to improve isolation layer fill in a DRAM array area
06/10/2003US6577994 Design rule generation system and recording medium recording program thereof
06/10/2003US6577993 Method of extracting parameters of diffusion model capable of extracting the parameters quickly
06/10/2003US6577979 Semiconductor integrated circuit having an Intellectual property test circuit to be used for testing the operation of each Intellectual property core (hereinafter referred to as IP) such as logical blocks of USB and JPEG, and DRAM
06/10/2003US6577972 Sampling inspection managing system
06/10/2003US6577923 Robotic alignment of objects (or openings in the objects) that may displace over time such as wafers during semiconductor processing
06/10/2003US6577551 Semiconductor integrated circuit having a built-in data storage circuit for nonvolatile storage of control data
06/10/2003US6577543 Semiconductor integrated circuit including a plurality of macros that can be operated although their operational voltages are different from each other
06/10/2003US6577541 Semiconductor integrated circuit device and control method therefor
06/10/2003US6577533 Nonvolatile semiconductor memory and method of manufacturing the same
06/10/2003US6577531 Nonvolatile memory and semiconductor device
06/10/2003US6577530 Semiconductor memory device having memory cells each capable of storing three or more values
06/10/2003US6577529 Multi-bit magnetic memory device
06/10/2003US6577527 Method for preventing unwanted programming in an MRAM configuration
06/10/2003US6577526 Magnetoresistive element and the use thereof as storage element in a storage cell array
06/10/2003US6577523 Reduced area sense amplifier isolation layout in a dynamic RAM architecture
06/10/2003US6577522 Semiconductor memory device including an SOI substrate
06/10/2003US6577389 System and methods for inspection of transparent mask substrates
06/10/2003US6577386 Method and apparatus for activating semiconductor impurities
06/10/2003US6577384 Spatial averaging technique for ellipsometry and reflectometry
06/10/2003US6577382 Substrate transport apparatus and method
06/10/2003US6577381 Projection exposure apparatus, and device manufacturing method using the same
06/10/2003US6577380 High-throughput materials processing system
06/10/2003US6577374 Active matrix substrate having column spacers integral with protective layer and process for fabrication thereof
06/10/2003US6577200 High-frequency semiconductor device
06/10/2003US6577156 Method and apparatus for initializing an integrated circuit using compressed data from a remote fusebox
06/10/2003US6577151 Inspection device for wiring of an integrated circuit
06/10/2003US6577150 Testing apparatus and method of measuring operation timing of semiconductor device
06/10/2003US6577148 Apparatus, method, and wafer used for testing integrated circuits formed on a product wafer
06/10/2003US6577124 Magnetic field sensor with perpendicular axis sensitivity, comprising a giant magnetoresistance material or a spin tunnel junction
06/10/2003US6577113 Apparatus and method for measuring substrate biasing during plasma processing of a substrate
06/10/2003US6577021 Static-type semiconductor memory device
06/10/2003US6577016 Semiconductor device having adhesive inflow preventing means
06/10/2003US6577015 Partial slot cover for encapsulation process
06/10/2003US6577014 Low-profile semiconductor device
06/10/2003US6577012 Laser defined pads for flip chip on leadframe package
06/10/2003US6577011 Chip interconnect wiring structure with low dielectric constant insulator and methods for fabricating the same
06/10/2003US6577010 Stepped photoresist profile and opening formed using the profile
06/10/2003US6577008 Metal redistribution layer having solderable pads and wire bondable pads
06/10/2003US6577007 Manufacturing process for borderless vias with respect to underlying metal
06/10/2003US6577006 Comprising a stable ohmic electrode which is not easily stripped and can be formed in a simple process on a nitride based semiconductor
06/10/2003US6577005 Fine protuberance structure and method of production thereof
06/10/2003US6577001 Semiconductor device and the method for manufacturing the same
06/10/2003US6577000 Premold type semiconductor package
06/10/2003US6576998 Thin semiconductor package with semiconductor chip and electronic discrete device
06/10/2003US6576997 Semiconductor device and method for fabricating the same
06/10/2003US6576996 Method for bonding heat sinks to overmolds and device formed thereby
06/10/2003US6576994 Semiconductor device
06/10/2003US6576991 Device with integrated circuit protected against attacks made by the controlled destruction of an additional layer
06/10/2003US6576985 Semiconductor device packaging assembly
06/10/2003US6576982 Use of sion for preventing copper contamination of dielectric layer
06/10/2003US6576980 Surface treatment anneal of hydrogenated silicon-oxy-carbide dielectric layer
06/10/2003US6576979 Use of selective oxidation conditions for dielectric conditioning
06/10/2003US6576978 Use of non-ion-implanted resistive silicon oxynitride films as resistors
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