Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2003
06/19/2003WO2003050866A1 Probe device
06/19/2003WO2003050865A1 Mold for used in multi flip-chip underfill encapsulation process
06/19/2003WO2003050864A2 Method for copper cmp using polymeric complexing agents
06/19/2003WO2003050863A1 Process for selectively etching dielectric layers
06/19/2003WO2003050862A1 Plasma etching method
06/19/2003WO2003050861A1 Apparatus and method for single- or double- substrate processing
06/19/2003WO2003050860A1 Substrate processing device
06/19/2003WO2003050859A1 Planarization of silicon carbide hardmask material
06/19/2003WO2003050858A1 Cmos process with an integrated, high performance, silicide agglomeration fuse
06/19/2003WO2003050855A1 Simultaneous formation of deep trench capacitor and resistor
06/19/2003WO2003050854A2 Chemical reactor templates: sacrificial layer fabrication and template use
06/19/2003WO2003050853A2 A method of forming a silicon nitride layer on a substrate
06/19/2003WO2003050850A2 Contacting of a semiconductor chip on a substrate using flip-chip-like technology
06/19/2003WO2003050849A2 High power-low noise microwave gan heterojunction field effet transistor
06/19/2003WO2003050817A2 Segmented write line architecture
06/19/2003WO2003050814A1 A matrix-addressable array of integrated transistor/memory structures
06/19/2003WO2003050813A2 A device and method to read a 2-transistor flash memory cell
06/19/2003WO2003050725A2 Assertion handling for timing model extraction
06/19/2003WO2003050724A2 Timing model extraction by timing graph reduction
06/19/2003WO2003050622A1 Multi-tone photomask and method for manufacturing the same
06/19/2003WO2003050617A2 Method of enhancing clear field phase shift masks by adding parallel line to phase 0 region
06/19/2003WO2003050616A1 Method of enhancing phase shift masks
06/19/2003WO2003050615A2 Photomask and method for qualifying the same with a prototype specification
06/19/2003WO2003050601A1 System for treating substrate and substrate dryer
06/19/2003WO2003050600A1 System for treating substrate and substrate dryer
06/19/2003WO2003050587A2 Catadioptrical reduction lens
06/19/2003WO2003050323A1 Cyclical deposition of refractory metal silicon nitride
06/19/2003WO2003050221A1 Compositions containing 1,3-dicarbonyl chelating agents for stripping residues from semiconductors
06/19/2003WO2003050196A2 Clear adhesive sheet
06/19/2003WO2003050038A1 Process for producing thin oxide film and production apparatus
06/19/2003WO2003050022A1 Monorail semiconductor wafer cassette transport system
06/19/2003WO2003049868A1 Nozzle device, and substrate treating apparatus having the device
06/19/2003WO2003049610A1 An apparatus for fluid transport and related method thereof
06/19/2003WO2003034463A3 Tunable multi-zone gas injection system
06/19/2003WO2003030244A8 Method for fabricating a power semiconductor device having a floating island voltage sustaining layer
06/19/2003WO2003023848A3 Apparatus and method of surface treatment for electrolytic and electroless plating of metals in integrated circuit manufacturing
06/19/2003WO2003015133A3 Showerhead electrode design for semiconductor processing reactor
06/19/2003WO2003009350A3 Flash anneal
06/19/2003WO2003007335A3 Single cast vertical wafer boat with a y shaped column rack
06/19/2003WO2002095817A3 Semiconductor component with at least one semiconductor chip on a base chip serving as substrate and method for production thereof
06/19/2003WO2002073698A3 A 2f2 memory device system and method
06/19/2003WO2002061833A3 Substrate for an electric component and method for the production thereof
06/19/2003WO2002054488A3 Ic package pressure release apparatus and method
06/19/2003WO2002047136A3 A method for producing soi wafers by delamination
06/19/2003WO2002047127A3 Pyroelectric device on a monocrystalline semiconductor substrate
06/19/2003WO2002004233A8 Compositions for cleaning organic and plasma etched residues for semiconductor devices
06/19/2003WO2000054331A9 Methods of forming local interconnects and conductive lines, and resulting structure
06/19/2003US20030115569 Method and system for optical proximity correction
06/19/2003US20030115564 Block based design methodology
06/19/2003US20030115554 Storage medium for recording interface specification definition
06/19/2003US20030115521 Method and apparatus for selectively compacting test responses
06/19/2003US20030115484 System and method for incrementally distributing a security policy in a computer network
06/19/2003US20030115322 System and method for analyzing security policies in a distributed computer network
06/19/2003US20030115177 Process failure information management system
06/19/2003US20030115128 Derivatives having demand-based, adjustable returns, and trading exchange therefor
06/19/2003US20030114598 A thermosetting resin contains an acetylenic oligomer or polymer with multi-phenyl adamantane ring, and bonded with porogen which can decompose to form pore; use as dielectric substrate in microchips, circuit boards
06/19/2003US20030114589 Novolak resin, a resin insoluble or poorly soluble itself in an alkali aqueous solution but becoming soluble by the action of an acid and an acid generator
06/19/2003US20030114083 Gel-free colloidal abrasive polishing compositions and associated methods
06/19/2003US20030114077 Chemical mechanical polishing (CMP) apparatus with temperature control
06/19/2003US20030114024 Printed wiring board having plurality of conductive patterns passing through adjacent pads, circuit component mounted on printed wiring board and circuit module containing wiring board with circuit component mounted thereon
06/19/2003US20030114019 Method for thermal processing semiconductor wafer
06/19/2003US20030114018 Method for fabricating a semiconductor component
06/19/2003US20030114017 Structure and method for fabricating GaN substrates from trench patterned GaN layers on sapphire substrates
06/19/2003US20030114016 Wafer carrier for semiconductor process tool
06/19/2003US20030114015 Apparatus for fabricating a semiconductor device and method of doing the same
06/19/2003US20030114014 Photoresist stripping solution and a method of stripping photoresists using the same
06/19/2003US20030114013 Toughness, adhesion and smooth metal lines of porous low k dielectric interconnect structures
06/19/2003US20030114012 Method for forming pattern using argon fluoride photolithography
06/19/2003US20030114011 Apparatus and method for producing semiconductors
06/19/2003US20030114010 Method of dry cleaning photoresist strips after via contact etching
06/19/2003US20030114009 Apparatus and method for fabricating semiconductor devices
06/19/2003US20030114008 Method for forming metal wire of semiconductor device
06/19/2003US20030114007 Semiconductor memory device having COB structure and method of fabricating the same
06/19/2003US20030114005 Method for surface roughness enhancement in semiconductor capacitor manufacturing
06/19/2003US20030114004 Methods of producing and polishing semiconductor device and polishing apparatus
06/19/2003US20030114003 Method of forming a mask having nitride film
06/19/2003US20030114002 Methods and apparatus for patterning a surface
06/19/2003US20030114001 Method of bonding and transferring a material to form a semiconductor device
06/19/2003US20030114000 Method for manufacturing semiconductor integrated circuit device
06/19/2003US20030113999 Method of forming metal wire of semiconductor device
06/19/2003US20030113997 Method of forming a metal interconnect
06/19/2003US20030113996 Semiconductor production device and production method for semiconductor device
06/19/2003US20030113995 Method for depositing a low k dielectric film (k<3.5) for hard mask application
06/19/2003US20030113994 Processing methods for providing metal-comprising materials within high aspect ratio openings
06/19/2003US20030113993 Method for fabricating semiconductor device
06/19/2003US20030113992 Method of depositing a low dielectric with organo silane
06/19/2003US20030113991 Semiconductor device manufacturing method
06/19/2003US20030113990 Microelectronic spring contact repair
06/19/2003US20030113989 Method of fabricating a MOS transistor with a shallow junction
06/19/2003US20030113988 Method for manufacturing semiconductor device
06/19/2003US20030113987 Method of manufacturing a semiconductor device
06/19/2003US20030113986 Method of producing semiconductor device
06/19/2003US20030113985 Field effect transistor semiconductor and method for manufacturing the same
06/19/2003US20030113984 Semiconductor wafer thinning method, and thin semiconductor wafer
06/19/2003US20030113983 Method and device for controlled cleaving process
06/19/2003US20030113982 Method of manufacturing semiconductor devices
06/19/2003US20030113981 Process for manufacturing a semiconductor wafer integrating electronic devices and a structure for electromagnetic decoupling
06/19/2003US20030113980 Method for manufacturing and structure of semiconductor assembly with a shallow trench device region
06/19/2003US20030113979 Process for making contact with and housing integrated circuits
06/19/2003US20030113978 Method for manufacturing a semiconductor device
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