Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2003
06/17/2003US6579805 In situ chemical generator and method
06/17/2003US6579804 Contact structure and production method thereof and probe contact assembly using same
06/17/2003US6579803 Removal of copper oxides from integrated interconnects
06/17/2003US6579802 Method of forming smooth morphologies in InP-based semiconductors
06/17/2003US6579801 Method for enhancing shallow trench top corner rounding using endpoint control of nitride layer etch process with appropriate etch front
06/17/2003US6579799 Method and apparatus for controlling chemical interactions during planarization of microelectronic substrates
06/17/2003US6579798 Processes for chemical-mechanical polishing of a semiconductor wafer
06/17/2003US6579797 Cleaning brush conditioning apparatus
06/17/2003US6579796 Method of etching platinum using a silicon carbide mask
06/17/2003US6579795 Method of making a semiconductor device that has copper damascene interconnects with enhanced electromigration reliability
06/17/2003US6579794 Tungsten layer formation method for semiconductor device and semiconductor device using the same
06/17/2003US6579793 Method of achieving high adhesion of CVD copper thin films on TaN Substrates
06/17/2003US6579792 Method of manufacturing a semiconductor device
06/17/2003US6579791 Method to form dual damascene structure
06/17/2003US6579790 Dual damascene manufacturing process
06/17/2003US6579789 Method for fabricating metal wiring and the metal wiring
06/17/2003US6579788 Method of forming conductive interconnections on an integrated circuit device
06/17/2003US6579787 Semiconductor device with a fluorinated silicate glass film as an interlayer metal dielectric film, and manufacturing method thereof
06/17/2003US6579786 Method for depositing a two-layer diffusion barrier
06/17/2003US6579785 Method of making multi-level wiring in a semiconductor device
06/17/2003US6579784 Method for forming a metal gate integrated with a source and drain salicide process with oxynitride spacers
06/17/2003US6579783 Method for high temperature metal deposition for reducing lateral silicidation
06/17/2003US6579782 Vertical power component manufacturing method
06/17/2003US6579781 Elimination of n+ contact implant from flash technologies by replacement with standard double-diffused and n+ implants
06/17/2003US6579780 Multilayer intermetallic
06/17/2003US6579779 Process for the preparation of an ideal oxygen precipitating silicon wafer having an asymmetrical vacancy concentration profile capable of forming an enhanced denuded zone
06/17/2003US6579778 Source bus formation for a flash memory using silicide
06/17/2003US6579777 Method of forming local oxidation with sloped silicon recess
06/17/2003US6579776 Method of manufacturing semiconductor device
06/17/2003US6579775 Semiconductor device having a metal gate with a work function compatible with a semiconductor device
06/17/2003US6579774 Semiconductor device fabrication method
06/17/2003US6579773 Transistor device and fabrication method thereof
06/17/2003US6579772 Discrete semiconductor device and manufacturing method thereof
06/17/2003US6579771 Self aligned compact bipolar junction transistor layout, and method of making same
06/17/2003US6579770 Sidewall process and method of implantation for improved CMOS with benefit of low CGD, improved doping profiles, and insensitivity to chemical processing
06/17/2003US6579769 Semiconductor device manufacturing method including forming FOX with dual oxidation
06/17/2003US6579768 Field effect transistor and method of fabrication
06/17/2003US6579767 Method for forming aluminum oxide as a gate dielectric
06/17/2003US6579766 Dual gate oxide process without critical resist and without N2 implant
06/17/2003US6579765 Metal oxide semiconductor field effect transistors
06/17/2003US6579764 Integrated circuit memory devices having non-volatile memory transistors and methods of fabricating the same
06/17/2003US6579763 Methods of forming an array of FLASH field effect transistors and circuitry peripheral to the array
06/17/2003US6579762 Nonvolatile semiconductor device having a memory cells each of which is constituted of a memory transistor and a selection transistor
06/17/2003US6579761 Method to improve the coupling ratio of top gate to floating gate in flash
06/17/2003US6579759 Formation of self-aligned buried strap connector
06/17/2003US6579758 Method and installation for fabricating one-sided buried straps
06/17/2003US6579757 Method for fabricating semiconductor device which prevents gates of a peripheral region from being oxidized
06/17/2003US6579756 DRAM processing methods
06/17/2003US6579755 High dielectric capacitor and method of manufacturing the same
06/17/2003US6579754 Semiconductor memory device having ferroelectric film and manufacturing method thereof
06/17/2003US6579753 Method of fabricating a semiconductor storage device having a transistor unit and a ferroelectric capacitor
06/17/2003US6579752 Phosphorus dopant control in low-temperature Si and SiGe epitaxy
06/17/2003US6579751 Semiconductor processing methods of forming integrated circuitry
06/17/2003US6579749 Fabrication method and fabrication apparatus for thin film transistor
06/17/2003US6579748 Fabrication method of an electronic component
06/17/2003US6579745 Method for mounting chips on board using magnetic positioning
06/17/2003US6579744 Electrical interconnections, methods of conducting electricity, and methods of reducing horizontal conductivity within an anisotropic conductive adhesive
06/17/2003US6579741 Monolithically integrated sensing device and method of manufacture
06/17/2003US6579740 Method of making a thin film sensor
06/17/2003US6579738 Method of alignment for buried structures formed by surface transformation of empty spaces in solid state materials
06/17/2003US6579736 Semiconductor device and method of manufacturing thereof
06/17/2003US6579734 Wire bonding method
06/17/2003US6579733 Using scatterometry to measure resist thickness and control implant
06/17/2003US6579732 Method and apparatus for controlling material removal from a semiconductor substrate using induced current endpointing
06/17/2003US6579731 Temperature measuring method and apparatus in semiconductor processing apparatus, and semiconductor processing method and apparatus
06/17/2003US6579730 Monitoring process for oxide removal
06/17/2003US6579729 Memory cell configuration and method for fabricating it
06/17/2003US6579727 Process for selectively sealing ferroelectric capacitive elements incorporated in semiconductor integrated non-volatile memory cells
06/17/2003US6579668 Photoresist remover composition
06/17/2003US6579666 Methodology to introduce metal and via openings
06/17/2003US6579657 Composite comprising layer comprising crosslinked fine pattern-forming material comprising water soluble resin, mixture, or copolymer and crosslinking agent formed on photosensitive resist pattern made of acid-containing material
06/17/2003US6579625 Magnetoelectronics element having a magnetic layer formed of multiple sub-element layers
06/17/2003US6579614 Structure having refractory metal film on a substrate
06/17/2003US6579589 Semiconductor wafer with crystal lattice defects, and process for producing this semiconductor wafer
06/17/2003US6579579 Container made of a light metal alloy and process for its manufacture
06/17/2003US6579479 Methods of forming a plurality of spheres; and pluralities of spheres
06/17/2003US6579471 Coating semiconductor wafer via dispensing slow-evaporation solvent on the wafer, spinning to distribute solvent, dispensing photoresist solution, and spinning to distribute photoresist; resuces surface tension and amount of resist
06/17/2003US6579465 Plasma surface treatment method and resulting device
06/17/2003US6579439 Electropolishing aluminum, in particular, aluminum alloy metal surfaces, by immersing the metal surface in a polishing solution and making the aluminum alloy material anodic. The polishing solution can comprise a phosphoric acid solution and
06/17/2003US6579430 Semiconductor wafer plating cathode assembly
06/17/2003US6579426 Use of variable impedance to control coil sputter distribution
06/17/2003US6579425 System and method for forming base coat and thin film layers by sequential sputter depositing
06/17/2003US6579424 Method for the production of substrates, magnetron source and sputter-coating chamber
06/17/2003US6579408 Apparatus and method for etching wafer backside
06/17/2003US6579407 Method and apparatus for aligning and setting the axis of rotation of spindles of a multi-body system
06/17/2003US6579399 Method and system for handling semiconductor components
06/17/2003US6579392 Preparing a green composite laminate comprising first green sheet layers each comprising a first particulate aggregate and second green sheet layers each comprising a second particulate aggregate unsinterable at a temperature for
06/17/2003US6579376 Method and apparatus for opening resin-sealed body
06/17/2003US6579374 Apparatus for fabrication of thin films
06/17/2003US6579373 Substrate processing apparatus and substrate processing method
06/17/2003US6579372 Apparatus and method for depositing thin film on wafer using atomic layer deposition
06/17/2003US6579370 Apparatus and method for coating treatment
06/17/2003US6579359 Method of crystal growth and resulted structures
06/17/2003US6579154 Polishing the surface of the specimen by activating the plasma radicals attached on the surface of the specimen with the friction thereby removing said convex portion of the specimen and planarizing the surface of the specimen
06/17/2003US6579153 Aqueous dispersion for chemical mechanical polishing and chemical mechanical polishing process
06/17/2003US6579149 Support and alignment device for enabling chemical mechanical polishing rinse and film measurements
06/17/2003US6579148 Polishing apparatus
06/17/2003US6579057 Conveyor apparatus for dies and small components
06/17/2003US6579056 Cart for mounting/demounting wafer transfer robot
06/17/2003US6579052 SMIF pod storage, delivery and retrieval system